TTL-MOS hex inverter/interface gate
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ccoo Level Translators/Buffers
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DM88L12 TTL-MOS hex inverter/interface gate
general description
The DM88L ...
Description
N.......
ccoo Level Translators/Buffers
c:!
DM88L12 TTL-MOS hex inverter/interface gate
general description
The DM88L 12 is a low power TTL to MOS hex inverter element. The outputs may be "pulled up" to +14V in the logical "1" state. thus providing guaranteed Interface between TTL and MOS logic levels. The gate may also be operated With Vcc
le.els up to +14V Without resistive pull·ups at the outputs and still providing a gua~anteed logical "1" level of Vcc - 2.2V with an output current of -200/lA.
schematic and connection diagrams
Dual-In-Line and Flat Package
. , 20'
500
Note S"own IS sehem~K: fOI each mveltel
typical applications
TTL I nterface to MOS ROM Without Resistive Pull-Up
TOPVIEW
Order Number DM88L12F See Package 4
Order Number DM88L 12J See Package 16
Order Number DM88L 12N See Package 22
GNO
TTL Interface to MOS ROM With Resistive Pull-Up
NATIONAL MDS RDM CEXAMPLEMM521)
ac test circuits
Vcc '140V
1 T. . ,',,'
~
"00.
FORVcc '1411
Figure 1
2·16
V...
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