ANALOG TO DIGITAL CONVERTER
EV12AS200AZP
ANALOG TO DIGITAL CONVERTER 12‐bit 1.5 GSps
Datasheet
Main features
• Single Core ADC Architecture with 1...
Description
EV12AS200AZP
ANALOG TO DIGITAL CONVERTER 12‐bit 1.5 GSps
Datasheet
Main features
Single Core ADC Architecture with 12‐bit Resolution Integrating a Selectable 1:1 and 1:2 DEMUX 1.5 GSps Guaranteed Conversion Rate 500 mVpp Analog Input Voltage (Differential Full Scale and AC Coupled) Very Low Latency (< 5 Clock Cycles) Noise Floor of –150 dBm/Hz (13‐bit ENOB in 10 MHz Bandwidth) Analog and Clock Input Impedance: 100 Differential Power Dissipation: 3.0W (1:1 Mode) ; 3.1W (1:2 Mode) Differential Input Clock (AC Coupled) LVDS Differential Output Data and Data Ready on the 2 Output Ports Write only 3WSI‐like Digital Interface (Gain, Offset, Sampling Delay adjust, DMUX Ratio Selection, test Modes) ADC Gain, Offset, Sampling Delay Adjustment for Interleaving Control Dynamic Test Mode (Alignment Sequence) Power Supplies: VCC...
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