P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐30V
RDSON (MAX.)
11...
P‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
BVDSS
‐30V
RDSON (MAX.)
110mΩ
ID ‐2.4A
Pb‐Free Lead Plating & Halogen Free
ESD Protection
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction‐to‐Ambient3
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1% 395°C / W when mounted on a 1 in2 pad of 2 oz copper.
2015/9/2
VGS ID IDM PD Tj, Tstg
TYPICAL
EMZFA1P03Z
LIMITS ±12 ‐2.4 ‐1.8 ‐9.6 1.3 0.84
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