Dual N‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
60V
RDSON (MAX.) ...
Dual N‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
BVDSS
60V
RDSON (MAX.)
60mΩ
ID 5A
UIS, 100% Tested
Pb‐Free Lead Plating
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
VGS
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
ID IDM
Avalanche Current
IAS
Avalanche Energy Repetitive Avalanche Energy2
L = 0.1mH, ID=7.5A, RG=25Ω
L = 0.05mH
EAS EAR
Power Dissipation
TC = 25 °C TC = 100 °C
Operating Junction & Storage Temperature Range
PD Tj, Tstg
100% UIS testing in condition of VD=30V, L=0.1mH, VG=10V, IL=5A, Rated VDS=60V N‐CH THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
Junction‐to‐Case
RJC
Junction‐to‐Ambient3
RJA
1Pulse...