Dual N‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
N‐CH
BVDSS RDSON (MA...
Dual N‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
N‐CH
BVDSS RDSON (MAX.)
100V 150mΩ
ID 3A
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 100 °C
Power Dissipation
TA = 25 °C TA = 100 °C
Operating Junction & Storage Temperature Range
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
VGS ID IDM PD Tj, Tstg
TYPICAL
Junction‐to‐Case
RJC
Junction‐to‐Ambient
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1%
2013/10/8
EMBA5A10G
LIMITS ±20 3 2.1 12 2 0.8
‐55 to 150
UNIT V
A
W °C
MAXIMUM 25...