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MMIS60R750P Datasheet
MMIS60R750P
600V 0.75Ω N-channel MOSFET
Description
MMIS60R750P is power MOSFET using Magnachip’s advanced super junction technology that can realize very low on-resistance and gate charge. It will provide much high efficiency by using optimized charge coupling technology. These user friendly devices give an advantage of Low EMI to designers as well as low switching loss.
Key Parameters
Parameter VDS @ Tj,max RDS(on),max
VTH,typ ID
Qg,typ
Value 650 0.75
3 5.7 15
Unit V Ω V A nC
Package & Internal Circuit
D
GDS
G S
Features
Low Power Loss by High Speed Switching and Low On-Resistance 100% Avalanche Tested Green Package – Pb Free Plating, Halogen Free
Applications
PFC Power Supply Stages Switching Applications Adapter Motor Control DC – DC Converters
Ordering Information
Order Code MMIS60R750PTH
Marking 60R750P
Temp. Range -55 ~ 150℃
Package TO-251-VS
Jun. 2021 Revision 1.2
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Packing Tube
RoHS Status Halogen Free
Magnachip Semiconductor Ltd.
MMIS60R750P Datasheet
Absolute Maximum Rating (Tc=25℃ unless otherwise specified)
Parameter
Symbol
Rating
Unit Note
Drain – Source voltage Gate – Source voltage
Continuous drain current
Pulsed drain current(1) Power dissipation Single - pulse avalanche energy MOSFET dv/dt ruggedness Diode dv/dt ruggedness Storage temperature Maximum operating junction temperature
1) Pulse width tP limited by Tj,max 2) ISD ≤ ID, VDS peak ≤ V(BR)DSS
VDSS VGSS
ID
IDM PD EAS dv/dt dv/dt Tstg Tj
600 ±30 5.7 3.6 17.1 48 75 50 15 -55 ~150 150
V V A A A W mJ V/ns V/ns ℃ ℃
TC=25℃ TC=100℃
Thermal Characteristics
Parameter Thermal resistance, junction-case max Thermal resistance, junction-ambient max
Symbol Rthjc Rthja
Value 2.6 62.5
Unit ℃/W ℃/W
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MMIS60R750P Datasheet
Static Characteristics (Tc=25℃ unless otherwise specified)
Parameter
Drain – Source Breakdown voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate Leakage Current
Drain-Source On State Resistance
Symbol Min. Typ. Max. Unit Test Condition
V(BR)DSS 600
-
-
V VGS = 0V, ID=0.25mA
VGS(th)
2
3
4
V VDS = VGS, ID=0.25mA
IDSS
-
-
1
μA VDS = 600V, VGS = 0V
IGSS
-
- 100 nA VGS = ±30V, VDS =0V
RDS(ON)
- 0.68 0.75 Ω VGS = 10V, ID = 2.0A
Dynamic Characteristics (Tc=25℃ unless otherwise specified)
Parameter
Symbol Min. Typ. Max. Unit Test Condition
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance Effective Output Capacitance Energy Related (3) Turn On Delay Time
Ciss Coss Crss Co(er) td(on)
- 575 - 430 - 20 - 16 - 11 -
VDS = 25V, VGS = 0V, pF f = 1.0MHz
VDS = 0V to 480V, VGS = 0V,f = 1.0MHz
Rise Time Turn Off Delay Time
tr td(off)
- 31 - 37 -
ns
VGS = 10V, RG = 25Ω, VDS = 300V, ID = 5.7A
Fall Time
tf
- 23 -
Total Gate Charge Gate – Source Charge Gate – Drain Charge
Qg
- 15 -
Qgs
- 4.5 -
nC
VGS = 10V, VDS = 480V, ID = 5.7A
Qgd
-
6
-
Gate Resistance
RG
- 4.5 -
Ω VGS = 0V, f = 1.0MHz
3) Co(er) is a capacitance that gives the same stored energy as COSS while VDS is rising from 0V to 80% V(BR)DSS
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Magnachip Semiconductor Ltd.
MMIS60R750P Datasheet
Reverse Diode Characteristics (Tc=25℃ unless otherwise specified)
Parameter Continuous Diode Forward Current Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Symbol Min. Typ. Max. Unit Test Condition
ISD
-
- 5.7 A
VSD
-
-
1.4
V ISD = 5.7 A, VGS = 0 V
trr
- 255 -
ns
ISD = 5.7 A
Qrr
- 1.7 -
μC di/dt = 100 A/μs
VDD = 100 V
Irrm
- 13.1 -
A
Jun. 2021 Revision 1.2
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Magnachip Semiconductor Ltd.
MMIS60R750P Datasheet
Jun. 2021 Revision 1.2
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Magnachip Semiconductor Ltd.
MMIS60R750P Datasheet
Jun. 2021 Revision 1.2
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Magnachip Semiconductor Ltd.
MMIS60R750P Datasheet
Jun. 2021 Revision 1.2
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Magnachip Semiconductor Ltd.
Test Circuit
Same type as DUT
100KΩ 10V
1mA 10V
DUT
+ VDS
-
Fig15-1. Gate charge measurement circuit
MMIS60R750P Datasheet
VGS 10V
Qgs
Qg Qgd
Charge
Fig15-2. Gate charge waveform
DUT
IS Rg 10KΩ
Vgs ± 15V
IF + - VDS L
Same type as DUT
+ VDD
-
Fig16-1. Diode reverse recovery test circuit
ID DUT
Rg 25Ω
VDS RL
trr
IFM
0.5 IRM
ta
tb
di/dt 0.75 IRM
0.25 IRM IRM
VR VRM(REC)
Fig16-1. Diode reverse recovery test waveform
VDS 90%
Vgs
tp
+ VDD
-
10% VGS
Fig17-1. Switching time test circuit for resistive load
IAS DUT
VDS
Rg
L
Td(on)
tr
ton
Td(off) tf toff
Fig17-2. Switching time waveform
tp IAS
BVDSS tAV
Vgs
tp
VDD
+ VDD
-
Fig18-1. Unclamped inductive load test circuit
VDS(t)
Rds(on) * IAS
Fig18-2. Unclamped inductive waveform
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Magnachip Semiconductor Ltd.
Physical Dimension
TO-251-VS (3L)
MMIS60R750P Datasheet
n
Jun. 2021 Revision 1.2
Note : Package body size, length and width do not include mold f.