Document
74LV132A
QUADRUPLE 2-INPUT NAND GATES WITH SCHMITT TRIGGER INPUTS
Description
Pin Assignments
The 74LV132A provides provides four independent 2-input NAND gates with standard push-pull outputs. Each input is a Schmitt Trigger device with a significant amount of hysteresis suiting the device for noisy environments. The device is designed for operation with a power supply range of 2.0V to 5.5V.
The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.
The gates perform the Boolean function:
Y A B or Y A B
Preliminary
Features
Wide Supply Voltage Range from 2.0V to 5.5V Sinks or sources 12mA at VCC = 4.5V CMOS low power consumption IOFF Supports Partial -Power Down Operation Inputs or Outputs accept up to 5.5V Inputs can b.