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CY7C2665KV18
144-Mbit QDR II+ SRAM Four-Word Burst Architecture
Description
CY7C2663KV18/CY7C2665KV18 144-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT 144-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features ■ Separate independent read and write data ports ❐ Supports concurrent transactions ■ 550-MHz clock for high bandwidth ■ Four-word burst for reducing a...
Cypress Semiconductor
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CY7C2665KV18
144-Mbit QDR II+ SRAM Four-Word Burst Architecture
- Cypress Semiconductor
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