CY7C1312KV18/CY7C1314KV18
18-Mbit QDR® II SRAM Two-Word Burst Architecture
18-Mbit QDR® II SRAM Two-Word Burst Architecture
Features
■ Separate independent read and write data ports ❐ Supports concurrent transactions
■ 333 MHz clock for high bandwidth ■ Two-word burst on all accesses ■ Double-data rate (DDR) interfaces on both read and write ports
(data tra...
