CY7C09359AV

CY7C09359AV3.3 V 4 K/8 K × 18 Synchronous Dual Port Static RAM CY7C09349AV CY7C09359AV 3.3 V 4 K/8 K × 18 Synchronous Dual Port Static RAM 3.3 V 4 K/8 K × 18 Synchronous Dual Port Static RAM Features ■ True dual ported memory cells which allow simultaneous access of the same memory location ■ Two flow-through/pipelined devices ❐ 4 K × 18 organization (CY7C09349AV) ❐ 8 K × 18 organization (CY7C09359AV) ■ Three modes ❐ Flow-through ❐ Pipelined ❐ Burst ■ Pipelined output mode on both ports allows fast 67-MHz operation ■ 0.35-micron complementary metal oxide semiconductor (CMOS) for optimum speed/power Logic Block Diagram R/WL UBL ■ High-speed clock to data access 9 and 12 ns (max) ■ 3.3 V low operating power ❐ Active = 135 mA (typical) ❐ Standby = 10 µA (typical) ■ Fully synchronous interface for easier operation ■ Burst counters increment addresses internally ❐ Shorten cycle times ❐ Minimize bus noise ❐ Supported in flow-through and pipeline...