ADN4612

Data Sheet FEATURES DC to 11.3 Gbps per port, NRZ data rate Multitime constant, programmable receive equalization Compensates 25 inches of FR408 at 10.3125 Gbps Compensates 15 inches of FR408 at 11.3 Gbps 6-tap programmable transmit feedforward equalization (FFE) Compensates 15 inches of FR408 at 10.3125 Gbps Compensates 10 inches of FR408 at 11.3 Gbps Low power 150 mW per channel at 2.5 V (outputs enabled) 12 × 12, fully differential, nonblocking array Double rank connection programming 2-pin selectable connection maps Per lane lost of signal (LOS) detection Flexible output termination supply range (1.8 V to 3.3 V) DC- or ac-coupled differential CML inputs and outputs Programmable CML output levels Load from EEPROM for automatic power-on ready operation Per lane input and output P/N pair inversion for routing ease 50 Ω on-chip input/output termination Supports 64-bit/66-bit, scrambled or not coded NRZ data up to 11.3 Gbps Serial (I2C or SPI slave) control interface 88-lead LFCSP, 12...