MCM67W518

MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM67W518 Product Pr~view 32Kx 18 Bit Asynchronous Fast Static RAM With Address Latch Byte Enable The MCM67W518 is a 589,824 bit static random access memory organized as 32,768 words of 18 bits, fabricated using Mo~orola's high-performance silicon-gate BiCMOS.technology. The device integrates a32K x 18 SRAM core with advanced FNPACKAGE PLASTIC CASE 778 peripheral circuitry consisting of address latches, active low chip enable, write . enable, separate upper and lower byte selects, and a fast output enable. This device has increased output drive capability supported by multiple power pins. Address latch enable (AL) is provided to simplify read and write cycles by guaranteeing address hold time in a simple fashion. When the address latch PIN ASSIGNMENT . .. en. <.) o· ~.~lwl~I~~~I:;:~I(!)~ ~.< input is high, the address latch is in the transparent state. If the latch enable is tied high, the device can be used as an asynchronous...