TC55BS8215J-12

TOSHIBA 131,072 WORD x 8 BIT SYNCHRONOUS STATIC RAM with Input Registers and Output Registers 1l:55BS8125}10/12 PRELIMINARY Description The TC55BS8125J is a 1,048,576 bit synchronous static random access memory fabricated using BiCMOS technology and organized as 131,072 words by 8 bits. The TC55BS8125J is similar to the TC55BS8128J but has common data I/O lines and does not have the write-cycle pass-through feature. Designed for pipelined architectures, this device has internal input and output registers which latch on the positive edge of an external clock (ClK). All address, data, and control signals are latched. The setup and hold times for the inputs are 2ns and 1ns respectively. Synchronous SRAMs can lead to faster, more robust system operation by virtually eliminating the timing skew problems associated with conventional asynchronous SRAMs. For example, write operations are internally self-timed when initiated - eliminating the need for accurate write pulse generation and timi...