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CD4095BMS

CMOS Gated J-K Master-Slave Flip-Flops

Description

CD4095BMS CD4096BMS December 1992 CMOS Gated J-K Master-Slave Flip-Flops Pinouts NC 1 RESET 2 J1 3 J2 4 J3 5 Q 6 VSS 7 Features Set-Reset Capability High Voltage Types (20V Rating) CD4095BMS Non-Inverting J and K Inputs CD4096BMS Inverting and Non-Inverting J and K Inputs 16MHz Toggle Rate (Typ.) at VDD - VSS = 10V Gated Inputs 100% Tested fo...

Intersil Corporation

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