A6259

Data Sheet 26186.120 6259 8-BIT ADDRESSABLE DMOS POWER DRIVER POWER GROUND 1 LOGIC SUPPLY 2 VDD S 0 (LSB) 3 OUT 0 4 OUT1 5 OUT 2 6 OUT 3 7 S1 8 LOGIC 9 GROUND POWER 10 GROUND LATCHES DECODER LOGIC LATCHES 20 POWER GROUND 19 CLEAR 18 DATA 17 OUT7 16 OUT6 15 OUT5 14 OUT 4 EN 13 ENABLE 12 S2 (MSB) 11 POWER GROUND Dwg. PP-050-2 Note that the A6259KA (DIP) and the A6259KLW (SOIC) are electrically identical and share a common terminal number assignment. ABSOLUTE MAXIMUM RATINGS at TA = 25°C Output Voltage, VO ............................ 50 V Output Drain Current, Continuous, IO ...................... 250 mA* Peak, IOM ............................. 750 mA*† Peak, IOM ................................... 2.0 A† Single-Pulse Avalanche Energy, EAS ............................................. 75 mJ Logic Supply Voltage, VDD .............. 7.0 V Input Voltage Range, VI ............................... -0.3 V to +7.0 V Package Power Dissipation, PD ....................................... See Graph Operating Temperature Range, TA ............................. -40°C to +125°C Storage Temperature Range, TS ............................. -55°C to +150°C *Each output, all outputs on. † Pulse duration ≤ 100 µs, duty cycle ≤ 2%. Caution: These CMOS devices have input static protection (Class 3) but are still susceptible to damage if exposed to extremely high static electrical charges. The A6259KA and A6259KLW combine a 3-to-8 line CMOS decoder and accompanying data latches, ...