CD4077BMS

CD4070BMS CD4077BMS December 1992 CMOS Quad Exclusive OR and Exclusive NOR Gates Pinouts A 1 B 2 Features High Voltage Types (20V Rating) CD4070BMS - Quad Exclusive OR Gate CD4077BMS - Quad Exclusive NOR Gate Medium Speed Operation - tPHL, tPLH = 65ns (Typ.) at VDD = 10V, CL = 50pF 5V, 10V and 15V Parametric Ratings Standardized, Symmetrical Output Characteristics 100% Tested for Quiescent Current at 20V Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” CD4070BMS TOP VIEW 14 VDD 13 H 12 G 11 M = G⊕H 10 L = E⊕F 9 F 8 E J = A⊕B 3 K = C⊕D 4 C 5 D 6 VSS 7 CD4077BMS TOP VIEW A 1 B 2 J = A⊕B 3 K = C⊕D 4 C 5 D 6 VSS 7 14 VDD 13 H 12 G 11 M = G⊕H 10 L = E⊕F 9 F 8 E Applications Logical Comparators Parity Generators and Checkers Adders/Subtractors Functional Diagram A J = A⊕B K = C⊕D M = G⊕H L = E⊕F VSS = 7 VDD = 14 B C D E F G H 1 2 5 6 8 9 12 13 10 4 3 J K Description CD4070BMS contains four independent Exclusive OR gates. The CD4077BMS contains four independent Exclusive NOR gates. The CD4070BMS and CD4077BMS provide the system designer with a means for direct implementation of the Exclusive OR and Exclusive NOR functions, respectively. The CD4070BMS and CD4077BMS are supp...