CD4069UBMS

CD4069UBMS December 1992 CMOS Hex Inverter Pinout CD4069UBMS TOP VIEW Features High Voltage Types (20V Rating) Standardized Symmetrical Output Characteristics Medium Speed Operation: tPHL, tPLH = 30ns (typ) at 10V 100% Tested for Quiescent Current at 20V Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” A 1 G=A 2 B 3 H=B 4 C 5 I=C 6 VSS 7 14 VDD 13 F 12 L = F 11 E 10 K = E 9 D 8 J=D Applications Logic Inversion Pulse Shaping Oscillators High-Input-Impedance Amplifiers Functional Diagram 1 A 2 G=A Description CD4069UBMS types consist of six CMOS inverter circuits. These devices are intended for all general-purpose inverter applications where the medium-power TTL-drive and logiclevel conversion capabilities of circuits such as the CD4009 and CD4049 Hex Inverter/Buffers are not required. The CD4069UBMS is supplied in these 14 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4H H1B VSS = 7 B 3 4 H=B 5 C 6 I=C 9 D 8 J=D 11 E 10 K=E H3W VDD = 14 13 F 12 L=F Schematic Diagram VDD VDD A 1(3, 5, 9, 11, 13) G=A G 2(4, 6, 8, 10, 12) VSS FIGURE 1. SCHEMATIC DIAGRAM OF 1 OF 6 IDENTICAL INVERTERS CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corpo...