AD7124-8

Data Sheet AD7124-8 8-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference FEATURES ► 3 power modes ► RMS noise ► Low power: 24 nV rms at 1.17 SPS, gain = 128 (255 µA typical) ► Mid power: 20 nV rms at 2.34 SPS, gain = 128 (355 µA typical) ► Full power: 23 nV rms at 9.4 SPS, gain = 128 (930 µA typical) ► Up to 22 noise free bits in all power modes (gain = 1) ► Output data rate ► Full power: 9.38 SPS to 19,200 SPS ► Mid power: 2.34 SPS to 4800 SPS ► Low power: 1.17 SPS to 2400 SPS ► Rail-to-rail analog inputs for gains > 1 ► Simultaneous 50 Hz/60 Hz rejection at 25 SPS (single cycle settling) ► Diagnostic functions (which aid safe integrity level (SIL) certification) ► Crosspoint multiplexed analog inputs ► 8 differential/15 pseudo differential inputs ► Programmable gain (1 to 128) ► Band gap reference with 10 ppm/°C drift maximum (70 µA) ► Matched programmable excitation currents ► Internal clock oscillator ► On-chip bias voltage generator FUNCTIONAL BLOCK DIAGRAM ► Low-side power switch ► General-purpose outputs ► Multiple filter options ► Internal temperature sensor ► Self and system calibration ► Sensor burnout detection ► Automatic channel sequencer ► Per channel configuration ► Power supply: 2.7 V to 3.6 V and ±1.8 V ► Independent interface power supply ► Power-down current: 5 µA maximum ► Temperature range: −40°C to +125°C ► 32-lead LFCSP ► 3-wire or 4-wire serial interface ► SPI, QSPI™, MICROWIRE™, and DSP compatible ► Schmitt trigger on SC...