PMS308416B

πPM Tech Document Title 256Mb (16Mb x 16) SDRAM Datasheet Revision History Revision 0.1 Date March, 2010 Page ― Original PMS308416B Notes This document is a general product description and subject to change without notice. πPM Tech PMS308416B 4M Words x 16 Bits x 4 Banks (256-MBIT) Synchronous Dynamic RAM Features z Clock frequency: 166, 133 MHz z Fully synchronous; all signals referenced to a positive clock edge z Four banks operation z Single 3.3V power supply z LVTTL interface z Programmable burst length 1, 2, 4, 8, full page z Programmable burst sequence: Sequential/Interleave z 8192 refresh cycles /64ms z Random column address every clock cycle z Programmable /CAS latency (2, 3 clocks) z Burst read/write and burst read/single write operations capability z Burst termination by burst stop and precharge command z Byte controlled by LDQM and UDQM General Description The PMS308416B is a high-speed CMOS synchronous DRAM. It is organized as 4 banks of 4,194,304 Words x 16...