831724

Differential Clock/Data Multiplexer 831724 Datasheet General Description The 831724 is a high-performance, differential HCSL clock/data multiplexer and fanout buffer. The device is designed for the multiplexing and fanout of high-frequency clock and data signals. The device has two differential, selectable clock/data inputs. The selected input signal is distributed to four low-skew differential HCSL outputs. Each input pair accepts HCSL, LVDS and LVPECL levels. The 831724 is characterized to operate from a 3.3V power supply. Guaranteed input, output-to-output and part-to-part skew characteristics make the 831724 ideal for those clock and data distribution applications demanding well-defined performance and repeatability. The 831724 supports the clock multiplexing and distribution of PCI Express Generation 1, 2, and 3 clock signals. Features 2:1 differential clock/data multiplexer with fanout Two selectable, differential inputs Each differential input pair can accept the ...