CD4002M CD4002C Dual 4-Input NOR Gate CD4012M CD4012C Dual 4-Input NAND Gate
March 1988
CD4002M CD4002C Dual 4-Input N...
CD4002M CD4002C Dual 4-Input NOR Gate CD4012M CD4012C Dual 4-Input NAND Gate
March 1988
CD4002M CD4002C Dual 4-Input NOR Gate CD4012M CD4012C Dual 4-Input NAND Gate
General Description
These NOR and NAND gates are monolithic complementary MOS (CMOS) integrated circuits The N- and P-channel enhancement mode
transistors provide a symmetrical circuit with output swings essentially equal to the supply voltage This results in high noise immunity over a wide supply voltage range No DC power other than that caused by leakage current is consumed during static conditions All inputs are protected against static discharge and latching conditions
Features
Y Y Y
Wide supply voltage range Low power High noise immunity
3 0V to 15V 10 nW (typ ) 0 45 VDD (typ )
Applications
Y Y Y Y
Automotive Data terminals Instrumentation Medical Electronics
Y Y Y Y
Alarm system Industrial controls Remote metering Computers
Connection Diagrams
CD4002 Dual-In-Line Package CD4012 Dual-In-Line Package
TL F 5940 – 1
TL F 5940 – 2
Top View Order Number CD4002 or CD4012
Top View
C1995 National Semiconductor Corporation
TL F 5940
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications
Voltage at Any Pin Operating Temperature Range CD4002M CD4012M CD4002C CD4012C VSS b0 3V to VDD a 0 3V
b 55 C to a 125 C b 40 C to a 85 C
Storage Tempera...