Document
5442A DM5442A DM7442A BCD to Decimal Decoders
June 1989
5442A DM5442A DM7442A BCD to Decimal Decoders
General Description
These BCD-to-decimal decoders consist of eight inverters and ten four-input NAND gates The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates Full decoding of input logic ensures that all outputs remain off for all invalid (10–15) input conditions
Features
Y Diode clamped inputs Y Also for application as 4-line-to-16-line decoders 3-line-
to-8-line decoders Y All outputs are high for invalid input conditions Y Typical power dissipation 140 mW Y Typical propagation delay 17 ns Y Alternate Military Aerospace device (5442A) is avail-
able Contact a National Semiconductor Sales Office Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL F 6516 – 1
Order Number 5442ADMQB 5442AFMQB DM5442AJ DM5442AW or DM7442AN See NS Package Number J16A N16E or W16A
Function Table
No BCD Input
Decimal Output
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