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MR45V200A

LAPIS
Part Number MR45V200A
Manufacturer LAPIS
Description FeRAM
Published Nov 25, 2016
Detailed Description MR45V200A FEDR45V200A-01 Issue Date: Jan. 31, 2014 2M(262,144-Word  8-Bit) FeRAM (Ferroelectric Random Access Memory)...
Datasheet PDF File MR45V200A PDF File

MR45V200A
MR45V200A

Overview
MR45V200A FEDR45V200A-01 Issue Date: Jan.
31, 2014 2M(262,144-Word  8-Bit) FeRAM (Ferroelectric Random Access Memory) SPI GENERAL DESCRIPTION The MR45V200A is a nonvolatile 262,144-word x 8-bit ferroelectric random access memory (FeRAM) developed in the ferroelectric process and silicon-gate CMOS technology.
The MR45V200A is accessed using Serial Peripheral Interface.
Unlike SRAMs, this device, whose cells are nonvolatile, eliminates battery backup required to hold data.
This device has no mechanisms of erasing and programming memory cells and blocks, such as those used for various EEPROMs.
Therefore, the write cycle time can be equal to the read cycle time and the power consumption durin...


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