CY7C1308DV25
9-Mbit 4-Word Burst SRAM with DDR-I Architecture
Features
Functional Description
9-Mbit density (256 Kbit x 36) 167-MHz clock for high bandwidth 4-Word Burst for reducing address bus frequency Double Data Rate (DDR) interfaces (data transferred at
333 MHz @ 167 MHz) Two input clocks (K and K) for precise DDR
timing—SRAM uses rising...
