AS4C512M16D3L

8Gb: x4, x8, x16 DDR3L SDRAM Description Revision History 8Gb: x4, x8, x16 DDR3L SDRAM AS4C2GM4D3L– 256 Meg x 4 x 8 banks* AS4C1G8MD3L– 128 Meg x 8 x 8 banks AS4C512M16D3L – 64 Meg x 16 x 8 banks Revision Rev 1.0 Rev 2.0 Details Preliminary datasheet Amend Table 1 noted. * not released yet Date February 2016 June 2016 Alliance Memory Inc. 551 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice. 0 8Gb: x4, x8, x16 DDR3L SDRAM Description DDR3L SDRAM AS4C2GM4D3L– 256 Meg x 4 x 8 banks* AS4C1G8MD3L– 128 Meg x 8 x 8 banks AS4C512M16D3L – 64 Meg x 16 x 8 banks Features VDD = VDDQ = 1.35V (1.283–1.45V) Backward compatible to VDD = VDDQ = 1.5V ±0.075V – Supports DDR3L devices to be backward compatible in 1.5V applications Differential bidirectional data strobe 8n-bit prefetch architecture Differential clock inputs (CK, CK#) 8 internal banks Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals Programmable CAS (READ) latency (CL) Programmable posted CAS additive latency (AL) Programmable CAS (WRITE) latency (CWL) Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS]) Selectable BC4 or BL8 on-the-fly (OTF) Self refresh mode TC of 0°C to +95°C – 64ms, 8192-cycle refresh at 0°C to +85°C – 32ms at +85°C to +95°C Self refresh temperature (SRT) Automatic self refresh (ASR) Writ...