32-bit ARM Cortex-M4/M0 MCU; up to 1 MB flash and 154 kB
SRAM; Ethernet, two High-speed USB, LCD, EMC
Rev. 1.2 — 14 March 2016
Product data sheet
1. General description
The LPC436x are ARM Cortex-M4 based microcontrollers for embedded applications,
which include an ARM Cortex-M0 coprocessor and an ARM Cortex-M0 subsystem for
managing peripherals, up to 1 MB of flash and 154 kB of on-chip SRAM, 16 kB of
EEPROM memory, a quad SPI Flash Interface (SPIFI), advanced configurable
peripherals such as the SCTimer/PWM and the Serial General Purpose I/O (SGPIO)
interface, two High-speed USB controllers, Ethernet, LCD, an external memory controller,
and multiple digital and analog peripherals. The LPC436x operate at CPU frequencies of
up to 204 MHz.
The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power
consumption, enhanced debug features, and a high level of support block integration. The
ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals, and
includes an internal prefetch unit that supports speculative branching. The ARM
Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A
hardware floating-point processor is integrated into the core.
The LPC436x include an application ARM Cortex-M0 coprocessor and a second ARM
Cortex-M0 subsystem for managing the SGPIO and SPI peripherals.The ARM Cortex-M0
coprocessor is an energy-efficient and easy-to-use 32-bit core which is upward code- and
tool-compatible with the Cortex-M4 core. The Cortex-M0 coprocessor, designed as a
replacement for existing 8/16-bit microcontrollers, offers up to 204 MHz performance with
a simple instruction set and reduced code size. In LPC436x, the Cortex-M0 coprocessor
hardware multiply is implemented as a 32-cycle iterative multiplier.
For additional documentation related to the LPC43xx parts, see Section 17.
2. Features and benefits
Cortex-M4 Processor core
ARM Cortex-M4 processor (version r0p1), running at frequencies of up to
Built-in Memory Protection Unit (MPU) supporting eight regions.
Built-in Nested Vectored Interrupt Controller (NVIC).
Hardware floating-point unit.
Non-maskable Interrupt (NMI) input.
JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watch
Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.