CY7S1049G

CY7S1049G CY7S1049GE 4-Mbit (512K words × 8 bit) Static RAM with PowerSnooze™ and Error Correcting Code (ECC) 4-Mbit (512K words × 8 bit) Static RAM with PowerSnooze™ and Error Correcting Code (ECC) Features ■ High speed ❐ Access time (tAA) = 10 ns / 15 ns ■ Ultra-low power Deep-Sleep (DS) current ❐ IDS = 15 µA ■ Low active and standby currents ❐ Active Current ICC = 38-mA typical ❐ Standby Current ISB2 = 6-mA typical ■ Wide operating voltage range: 1.65 V to 2.2 V, 2.2 V to 3.6 V, 4.5 V to 5.5 V ■ Embedded ECC for single-bit error correction ■ Error indication (ERR) pin to indicate 1-bit error detection and correction ■ 1.0-V data retention ■ TTL- compatible inputs and outputs ■ Available in Pb-free 44-pin TSOP II, and 36-pin (400-mil) molded SOJ Functional Description The CY7S1049G/CY7S1049GE is a high-performance PowerSnooze™ static RAM organized as 512K words × 8 bits. This device features fast access times (10 ns) and a unique ultra-low power Deep-Sleep mode. With Deep-Sleep mode currents as low as 15 µA, the CY7S1049G/CY7S1049GE devices combine the best features of fast and low- power SRAMs in industry-standard package options. The device also features embedded ECC. logic which can detect and correct single-bit errors in the accessed location. Deep-Sleep input (DS) must be deasserted HIGH for normal operating mode. To perform data writes, assert the Chip Enable (CE) and Write Enable (WE) inputs LOW, and provide the data and address on device data pins (I/O0 through I/...