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CY7C1371S

Cypress

18-Mbit (512K x 36) Flow-Through SRAM


Description
CY7C1371S 18-Mbit (512K × 36) Flow-Through SRAM with NoBL™ Architecture 18-Mbit (512K × 36) Flow-Through SRAM with NoBL™ Architecture Features ■ No Bus Latency (NoBL) architecture eliminates dead cycles between write and read cycles ■ Supports up to 133-MHz bus operations with zero wait states ■ Data is transferred on every clock ■ Pin-compatible and func...



Cypress

CY7C1371S

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