CY7C1371S
18-Mbit (512K × 36) Flow-Through SRAM with NoBL™ Architecture
18-Mbit (512K × 36) Flow-Through SRAM with NoBL™ Architecture
Features
■ No Bus Latency (NoBL) architecture eliminates dead cycles between write and read cycles
■ Supports up to 133-MHz bus operations with zero wait states ■ Data is transferred on every clock ■ Pin-compatible and func...