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CY7C1061G

Cypress

16-Mbit (1 M words x 16 bit) Static RAM

CY7C1061G Automotive 16-Mbit (1 M words × 16 bit) Static RAM with Error-Correcting Code (ECC) 16-Mbit (1 M words × 16 b...


Cypress

CY7C1061G

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Description
CY7C1061G Automotive 16-Mbit (1 M words × 16 bit) Static RAM with Error-Correcting Code (ECC) 16-Mbit (1 M words × 16 bit) Static RAM with Error-Correcting Code (ECC) Features ■ High speed ❐ tAA = 10 ns ■ Temperature range ❐ Automotive-E: –40 °C to 125 °C ■ Embedded error-correcting code (ECC) for single-bit error correction ■ Low active and standby currents ❐ ICC = 90-mA typical at 100 MHz ❐ ISB2 = 20-mA typical ■ Operating voltage range: 2.2 V to 3.6 V ■ 1.0-V data retention ■ Transistor-transistor logic (TTL) compatible inputs and outputs ■ Available in Pb-free 48-ball VFBGA and 48-pin TSOP I packages Functional Description CY7C1061G[1] is a high-performance CMOS fast static RAM automotive part with embedded ECC. ECC logic can detect and correct single-bit error in read data word during read cycles. This device has single chip enable input and is accessed by asserting the chip enable input (CE) LOW. To perform data writes, assert the Write Enable (WE) input LOW and provide the data and address on the device data pins (I/O0 through I/O15) and address pins (A0 through A19) respectively. The Byte High Enable (BHE) and Byte Low Enable (BLE), inputs control byte writes and write data on the corresponding I/O lines to the memory location specified. BHE controls I/O8 through I/O15 and BLE controls I/O0 through I/O7. To perform data reads, assert the Output Enable (OE) input and provide the required address on the address lines. Read data is accessible on I/O lines (I/O0 through...




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