PI6C5946002

PI6C5946002 6 GHz / 12 Gbps Clock / Data Fanout Buffer with Internal Termination Features ÎÎInput Clock Frequency up to 6 GHz Typical ÎÎMaximum Input Data Rate up to 12 Gbps Typical ÎÎ2 pairs of differential CML outputs ÎÎLow additive jitter, < 0.05ps (max) ÎÎInput accepts: CML, LVDS, CML, SSTL input level ÎÎOutput to Output skew: <20ps ÎÎOperating Temperature: -40oC to 85oC ÎÎPower supply: 3.3V ±10% or 2.5V ±5% ÎÎPackaging (Pb-free & Green) ÎÎ16-pin TQFN available Description The PI6C5946002 is a high-performance low-skew 1-to-2 CML clock or data fanout buffer. The inputs accept CML, LVDS, CML and SSTL signals with internal termination resistors. PI6C5946002 is ideal for clock / data distribution applications. Block Diagram Pin Configuration DNC DNC VDD GND REF_IN+ VTH REF_IN- EN D Q LE Q0+ Q0- 16 15 14 13 Q1+ Q0+ 1 12 REF_IN+ Q1- Q0- 2 11 VTH Q1+ 3 10 VREF-AC Q1- 4 9 REF_IN- 5678 DNC DNC VDD EN 14-0180 1 PI6C5946002 Rev A 11/04/14 PI6C5946002 6 GHz / 12 Gbps Clock / Data Fanout Buffer with Internal Termination Pin Description(1) Pin # 1, 2 3, 4 5, 6, 15, 16 7 Name Q0+, Q0Q1+, Q1DNC VDD 8 EN 9 REF_IN- 10 VREF-AC 11 VTH 12 REF_IN+ 13 GND 14 VDD Type Output Output Power Input Input Output Input Input Power Power Description Differential output pair, CML interface level. Differential output pair, CML interface level. Do Not Connect Core Power Supply Synchronous Output Enable, with internal 25k-ohm pull-up resistor. Logic high selects enable, and ...