PI6C49004A

PI6C49004A PCIe® Gen 2 Networking Clock Generator Features 3.3V +/-10% Supply Voltage Uses 25MHz xtal such as Saronix-eCera™ SRX7278 Twelve PCIe® Gen. 2 100MHz HCSL outputs with optional -0.5% spread spectrum support Two LVCMOS 50MHz outputs that support +/- 10% frequency margining One frequency selectable 33/66/133MHz LVCMOS output One 32.256MHz LVCMOS output Industrial temperature -40°C to 85°C Package: 56-pin TSSOP package Description The PI6C49004A is a clock generator device intended for PCIe® Gen2 networking applications. The device includes twelve 100MHz differential Host Clock Signal Level (HCSL) outputs for PCIe Gen 2, two single-ended 50MHz outputs, one singleended 32.256MHz output, and one selectable single-ended 33/66/133MHz output. Using a serially programmable SMBUS interface, the PI6C49004A incorporates spread spectrum modulation on the twelve 100MHz HCSL PCIe Gen 2 outputs, and independent frequency margining on the 50MHz output, 33.3333MHz and 66.6666MHz clock outputs. Pin Configuration Block Diagram 25 MHz crystal or clock input Clock Buffer/ Crystal Oscillator VDD 12 SCLK SDATA PD_RESET PLL, Dividers, Buffers, and Logic 12 100M_OUT(0-11) 2 50M_OUT(1-2) 33/66/133M_OUT1 32.256M_OUT1 8 GND ISET 475 Ohms 1% VDD IREF NC 100M_Q11100M_Q11+ 100M_Q10100M_Q10+ VDD VDD GND 100M_Q9100M_Q9+ 100M_Q8100M_Q8+ 100M_Q7100M_Q7+ SCLK SDATA GND 50M_OUT1 50M_OUT2 VDD GND VDD 32.256M_OUT1 GND NC PD_RESET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16...