30N50

HiPerFETTM Power MOSFETs N-Channel Enhancement Mode High dv/dt, Low trr, HDMOSTM Family IXFH/IXFT 30N50 IXFH/IXFT 32N50 V DSS 500 V 500 V I D25 30 A 32 A R DS(on) 0.16 W 0.15 W trr £ 250 ns Symbol Test Conditions VDSS VDGR TJ = 25°C to 150°C TJ = 25°C to 150°C; RGS = 1 MW VGS V GSM Continuous Transient ±30 ID25 TC = 25°C IDM TC = 25°C pulse width limited by TJM IAR TC = 25°C 30N50 32N50 30N50 32N50 30N50 32N50 EAS EAR dv/dt TC = 25°C ID = 25°C I S £ I, DM di/dt £ 100 A/ms, V DD £ V, DSS TJ £ 150°C, RG = 2 W PD TC = 25°C TJ TJM Tstg TL 1.6 mm (0.062 in.) from case for 10 s M Mounting torque d Weight Maximum Ratings 500 V 500 V ±20 V V 30 A 32 A 120 A 128 A 30 A 32 A 1.5 J 45 mJ 5 V/ns 360 W -55 ... +150 150 -55 ... +150 °C °C °C 300 °C 1.13/10 Nm/lb.in. 6g Symbol Test Conditions Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. VDSS VGS = 0 V, ID = 1 mA VDSS temperature coefficient VGS(th) VDS = VGS, ID = 4 mA VGS(th) temperature coefficient IGSS VGS = ±20 VDC, VDS = 0 IDSS VDS = 0.8 VDSS V =0V GS TJ = 25°C T J = 125°C RDS(on) VGS = 10 V, ID = 15A 32N50 30N50 Pulse test, t £ 300 ms, duty cycle d £ 2 % 500 0.102 V %/K 2 4V -0.206 %/K ±100 nA 200 mA 1 mA 0.15 W 0.16 W TO-247 AD (IXFH) D (TAB) TO-268 (D3) Case Style G S (TAB) G = Gate, S = Source, D = Drain, TAB = Drain Features International standard packages Low RDS (on) HDMOSTM process Rugged polysilicon gate cell struct...