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SS542

SEC

Hall Latch - High Sensitivity

SS542 Hall Latch - High Sensitivity Features and Benefits – CMOS Hall IC Technology – Bipolar Output CMOS Multi-purpose...


SEC

SS542

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SS542 Hall Latch - High Sensitivity Features and Benefits – CMOS Hall IC Technology – Bipolar Output CMOS Multi-purpose latch – Solid-State Reliability much better than reed switch – Operation down to 2.5V – Supply current down to 45μA, very low power consumption – CMOS inverter output (no pull-up resistance) – High sensitivity for direct reed switch re- placement application Application Examples – Solid state switch – Magneto-electric conversion switch – Magnet proximity sensor for reed switch re- placement in low duty cycle applications 3 pin TSOT23 (suffix ST) 3 pin SIP (suffix UA) Functional Block Diagram 1 V3.10 Nov 1, 2013 SS542 Hall Latch - High Sensitivity General Description The SS542 Hall effect sensor IC is fabricated from mixed signal CMOS technology. It incorporates advanced chopper-stabilization techniques to provide accurate and stable magnetic switch points. The circuit design provides an internally controlled clocking mechanism to cycle power to the Hall element and analog signal processing circuits. This serves to place the high current-consuming portions of the circuit into a “Sleep” mode. Periodically the device is “Awakened” by this internal logic and the magnetic flux from the Hall element is evaluated against the predefined thresholds. If the flux density is above or below the Bop/Brp thresholds then the output transistor is driven to change states accordingly. While in the “Sleep” cycle the output transistor is latched in its previous state. ...




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