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CDP1824 Dataheets PDF



Part Number CDP1824
Manufacturers Intersil Corporation
Logo Intersil Corporation
Description 32-Word x 8-Bit Static RAM
Datasheet CDP1824 DatasheetCDP1824 Datasheet (PDF)

CDP1824, CDP1824C March 1997 32-Word x 8-Bit Static RAM Description The CDP1824 and CDP1824C are 32-word x 8-bit fully static CMOS random-access memories for use in CDP-1800 series microprocessor systems. These parts are compatible with the CDP1802 microprocessor and will interface directly without additional components. The CDP1824 is fully decoded and does not require a precharge or clocking signal for proper operation. It has common input and output and is operated from a single voltage supp.

  CDP1824   CDP1824



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CDP1824, CDP1824C March 1997 32-Word x 8-Bit Static RAM Description The CDP1824 and CDP1824C are 32-word x 8-bit fully static CMOS random-access memories for use in CDP-1800 series microprocessor systems. These parts are compatible with the CDP1802 microprocessor and will interface directly without additional components. The CDP1824 is fully decoded and does not require a precharge or clocking signal for proper operation. It has common input and output and is operated from a single voltage supply. The MRD signal (output disable control) enables the three-state output drivers, and overrides the MWR signal. A CS input is provided for memory expansion. The CDP1824C is functionally identical to the CDP1824. The CDP1824 has an operating range of 4V to 10.5V, and the CDP1824C has an operating voltage range of 4V to 6.5V. The CDP1824 and CDP1824C are supplied in 18 lead hermetic dual-in-line ceramic packages (D suffix), and in 18 lead dual-in-line plastic packages (E suffix). Features • Fast Access Time - VDD = 5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 710ns - VDD = 10V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320ns • No Precharge or Clock Required Ordering Information 5V CDP1824CE CDP1824CEX CDP1824CD CDP1824E CDP1824EX CDP1824D 10V PDIP Burn-In SBDIP -40oC to +85oC PACKAGE TEMPERATURE RANGE -40oC to +85oC PKG. NO. E18.3 E18.3 D18.3 Pinout CDP1824, CDP1824C (PDIP, SBDIP) TOP VIEW FUNCTION MA4 MA3 MA2 MA1 MA0 BUS 7 BUS 6 BUS 5 VSS 1 2 3 4 5 6 7 8 9 18 VDD 17 MWR 16 MRD 15 CS 14 BUS 0 13 BUS 1 12 BUS 2 11 BUS 3 10 BUS 4 OPERATIONAL MODES CS 0 0 1 0 MRD MWR 0 1 X 1 X 0 X 1 DATA PINS STATUS Output: High/Low Dependent on Data Input: Output Disabled Output Disabled: High-Impedance State Output Disabled: High-Impedance State READ WRITE Not Selected Standby Logic 1 = High Logic 0 = Low X = Don’t Care CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 File Number 1103.2 6-37 CDP1824, CDP1824C Absolute Maximum Ratings DC Supply Voltage Range, (VDD) (All Voltages Referenced to VSS Terminal) CDP1824 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +11V CDP1824C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to VDD +0.5V DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range (TA) Package Type D . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC Package Type E . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC Thermal Information Thermal Resistance (Typical) θJA (oC/W) θJC (oC/W) SBDIP Package . . . . . . . . . . . . . . . . . . 75 20 PDIP Package . . . . . . . . . . . . . . . . . . . 75 N/A Storage Temperature Range (TSTG). . . . . . . . . . . .-65oC to +150oC Lead Temperature (During Soldering) At distance 1/16 ±1/32 In. (1.59 ± 0.79mm) from case for 10s max . . . . . . . . . . . . . . . . . . . . . . . . . . . . +265oC Recommended Operating Conditions At TA = Full Package Temperature Range.For maximum reliability, operating conditions should be selected so that operation is always within the following ranges: CONDITION CDP1824D LIMITS CDP1824CD MIN 4 VSS MAX 6.5 VDD 5 UNITS V V µs µs PARAMETER Supply Voltage Range Recommended Input Voltage Range Input Signal Rise or Fall Time (Note 1) tR, tF NOTE: VDD (V) 5 10 MIN 4 VSS - MAX 10.5 VDD 5 2 1. Input signal rise or fall times longer than these maxima can cause loss of stored data in either the selected or deselected mode. Static Electrical Specifications At TA = -40oC to +85oC, Except as Noted: CONDITIONS CDP1824 LIMITS CDP1824C MAX 50 500 0.1 0.1 1.5 3 ±1 ±1 8 16 MIN 1.8 -0.9 4.9 3.5 (NOTE 1) TYP 100 2.2 -1.1 0 5 ± 0.1 4 MAX 200 0.1 1.5 ±1 8 UNITS µA µA mA mA mA mA V V V V V V V V µA µA mA mA PARAMETER Quiescent Device Current Output Low (Sink) Current Output High (Source) Current Output Voltage Low-Level Output Voltage High-Level Input Low Voltage SYMBOL IDD VO (V) - VIN (V) 0, 5 0, 10 0, 5 0, 10 0, 5 0, 10 0, 5 0, 10 0, 5 0, 10 0, 5 0, 10 VDD (V) 5 10 5 10 5 10 5 10 5 10 5 10 5 10 5 10 5 10 MIN 1.8 3.6 -0.9 -1.8 4.9 9.9 3.5 7 - (NOTE 1) TYP 25 250 2.2 4.5 -1.1 -2.2 0 0 5 10 ± 0.1 ± 0.1 4 8 IOL 0.4 0.5 IOH 4.6 9.5 VOL - VOH - VIL 0.5, 4.5 1.9 Input High Voltage VIH 0.5, 9.5 1.9 Input Leakage Current IIN Any Input - Operating Current (Note 2) IDD1 6-38 CDP1824, CDP1824C Static Electrical Specifications At TA = -40oC to +85oC, Except as Noted: (Continued) CONDITIONS CDP1824 PARAMETER Three-State Output Leakage Current Input Capacitance Output Capacitance NOTES: 1. Typical values are for TA = +25oC and nominal VDD. 2. Outputs open circuited; Cycle time = 1µs. SYMBOL IOUT VO (V) 0, 5 0, 10 CIN COUT VIN (V) 0, 5 0, 10 VDD (V) 5 10 MIN (NOTE 1) TYP ± 0.2 ± 0.2 5 .


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