CDP1822C

CDP1822C/3 March 1997 High-Reliability CMOS 256-Word x 4-Bit LSI Static RAM Description The CDP1822C/3 is a 256 word by 4-bit random access memory designed for use in memory systems where high speed, low operating current, and simplicity in use are desirable. The CDP1822 features high speed and excellent noise immunity. It has separate data inputs and outputs and utilizes a single power supply of 4V to 6.5V. Two Chip Select inputs simplify system expansion. An output Disable control provides Wire-OR-capability and is also useful in common Input/Output systems. The Output Disable input allows this RAM to be used in common data Input/Output systems by forcing the output into a high impedance state during a write operation independent of the Chip Select input condition. The output assumes a high impedance state when the Output Disable is at high level or when the chip is deselected by CS1 and/or CS2. The high noise immunity of the CMOS technology is preserved in this design. For TTL interfacing at 5V operation, excellent system noise margin is preserved by using an external pull-up resistor at each input. Features For Applications in Aerospace, Military, and Critical Industrial Equipment Interfaces Directly with CDP1802 Microprocessor Very Low Operating Current - At VDD = 5V and Cycle Time = 1µs . . . . . . 4mA (Typ) Static CMOS Silicon-On-Sapphire Circuitry - CD4000 Series Compatible Industry Standard Pinout Two Chip Select Inputs - Simple Memory Expansion Memor...