IS45R86400F

IS42R86400F/16320F, IS45R86400F/16320F IS42S86400F/16320F, IS45S86400F/16320F 32Mx16, 64Mx8 512Mb SDRAM FEATURES Clock frequency: 200, 166, 143 MHz Fully synchronous; all signals referenced to a positive clock edge Internal bank for hiding row access/precharge Power supply: Vdd/Vddq = 2.3V-3.6V IS42/45SxxxxxF - Vdd/Vddq = 3.3V IS42/45RxxxxxF - Vdd/Vddq = 2.5 LVTTL interface Programmable burst length – (1, 2, 4, 8, full page) Programmable burst sequence: Sequential/Interleave Auto Refresh (CBR) Self Refresh 8K refresh cycles every 64 ms Random column address every clock cycle Programmable CAS latency (2, 3 clocks) Burst read/write and burst read/single write operations capability Burst termination by burst stop and precharge command Packages: x8/x16: 54-pin TSOP-II, 54-ball TF-BGA (x16 only) Temperature Range: Commercial (0oC to +70oC) Industrial (-40oC to +85oC) Automotive, A1 (-40oC to +85oC) Automotive, A2 (-40oC to +105oC) JULY 2017 device OVERVIEW ISSI's 512Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 512Mb SDRAM is organized as follows. PACKAGE INFORMATION IS42/45S16320F IS42/45S86400F IS42/45R16320F IS42/45R86400F 8M x 16 x 4 banks 16M x 8 x 4 banks 54-pin TSOP-II 54-pin TSOP-II 54-ball TF-BGA KEY TIMING PARAMETERS Parameter Clk Cycle Time CAS Latency = 3 CAS Latency = 2 Clk Frequency CAS Latency = 3 CAS Laten...