IS45SM32400G

IS42/45SM/RM/VM32400G 1M x 32Bits x 4Banks Mobile Synchronous DRAM Description These IS42/45SM/RM/VM32400G are mobile 134,217,728 bits CMOS Synchronous DRAM organized as 4 banks of 1,048,576 words x 32 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input and output voltage levels are compatible with LVCMOS. Features  JEDEC standard 3.3V, 2.5V, 1.8V power supply Auto refresh and self refresh All pins are compatible with LVCMOS interface 4K refresh cycle / 64ms Programmable Burst Length and Burst Type 1, 2, 4, 8 or Full Page for Sequential Burst 4 or 8 for Interleave Burst Programmable CAS Latency : 2,3 clocks All inputs and outputs referenced to the positive edge of the system clock Data mask function by DQM Internal 4 banks operation Burst Read Single Write operation Special Function Support PASR(Partial Array Self Refresh) Auto TCSR(Temperature Compensated Self Refresh) Programmable Driver Strength Control Full Strength or 1/2, 1/4, 1/8 of Full Strength Deep Power Down Mode Automatic precharge, includes CONCURRENT Auto Precharge Mode and controlled Precharge Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time wi...