4M x 4 (16-MBIT) DYNAMIC RAM
IS41LV44052B
4M x 4 (16-MBIT) DYNAMIC RAM WITH FAST PAGE MODE
JANUARY 2010
FEATURES
• Fast Page Mode Access Cycle • ...
Description
IS41LV44052B
4M x 4 (16-MBIT) DYNAMIC RAM WITH FAST PAGE MODE
JANUARY 2010
FEATURES
Fast Page Mode Access Cycle TTL compatible inputs and outputs Refresh Interval:
-- 2,048 cycles/32 ms Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden Single power supply: 3.3V ± 10% Byte Write and Byte Read operation via two CAS
Industrial temperature range -40°C to 85°C
DESCRIPTION
The ISSI IS41LV44052B is a 4,194,304 x 4-bit high-performance
CMOS Dynamic Random Access Memory. The Fast Page Mode allows 2,048 or 4096 random accesses within a single row with access cycle time as short as 20 ns per 4-bit word.
These features make the IS41LV44052B ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.
The IS41LV44052B is packaged in a 24-pin TSOP-II with JEDEC standard pinouts.
PRODUCT SERIES OVERVIEW
Part No. IS41LV44052B
Refresh 2K
Voltage 3.3V ± 10%
KEY TIMING PARAMETERS
Parameter RAS Access Time (trac) CAS Access Time (tcac) Column Address Access Time (taa) Fast Page Mode Cycle Time (tpc) Read/Write Cycle Time (trc)
-50 50 13 25 20 84
-60 Unit 60 ns 15 ns 30 ns 25 ns 104 ns
PIN CONFIGURATION
24 (26) Pin TSOP-II
VCC I/O0 I/O1 WE RAS *A11(NC)
1 2 3 4 5 6
A10 A0 A1 A2 A3
VCC
7 8 9 10 11 12
24 GND 23 I/O3 22 I/O2 21 CAS 20 OE 19 A9
18 A8 17 A7 16 A6 15 A5 14 A4 13 GND
PIN DESCRIPTIONS
A0-A10 Address Inputs (2K Refresh)
...
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