DatasheetsPDF.com
IS61DDPB42M18B2
36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM
Description
IS61DDPB42M18B/B1/B2 IS61DDPB41M36B/B1/B2 2Mx18, 1Mx36 36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM (2.5 Cycle Read Latency) NOVEMBER 2014 FEATURES DESCRIPTION 1Mx36 and 2Mx18 configuration available. On-chip Delay-Locked Loop (DLL) for wide data valid window. Common I/O read and write ports. Synchronous pipeline read with self-timed late write ope...
Integrated Silicon Solution
Download IS61DDPB42M18B2 Datasheet
Similar Datasheet
IS61DDPB42M18A
36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM
- Integrated Silicon Solution
IS61DDPB42M18A1
36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM
- Integrated Silicon Solution
IS61DDPB42M18A2
36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM
- Integrated Silicon Solution
IS61DDPB42M18B
36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM
- Integrated Silicon Solution
IS61DDPB42M18B1
36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM
- Integrated Silicon Solution
IS61DDPB42M18B2
36Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM
- Integrated Silicon Solution
@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (
Privacy Policy & Contact
)