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NCP1612A3 Dataheets PDF



Part Number NCP1612A3
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description High-Efficiency Power Factor Controller
Datasheet NCP1612A3 DatasheetNCP1612A3 Datasheet (PDF)

NCP1612A, NCP1612B, NCP1612A1, NCP1612A2, NCP1612A3, NCP1612B2 Enhanced, High‐Efficiency Power Factor Controller The NCP1612 is designed to drive PFC boost stages based on an innovative Current Controlled Frequency Fold-back (CCFF) method. In this mode, the circuit classically operates in Critical conduction Mode (CrM) when the inductor current exceeds a programmable value. When the current is below this preset level, the NCP1612 linearly decays the frequency down to about 20 kHz when the curr.

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NCP1612A, NCP1612B, NCP1612A1, NCP1612A2, NCP1612A3, NCP1612B2 Enhanced, High‐Efficiency Power Factor Controller The NCP1612 is designed to drive PFC boost stages based on an innovative Current Controlled Frequency Fold-back (CCFF) method. In this mode, the circuit classically operates in Critical conduction Mode (CrM) when the inductor current exceeds a programmable value. When the current is below this preset level, the NCP1612 linearly decays the frequency down to about 20 kHz when the current is null. CCFF maximizes the efficiency at both nominal and light load. In particular, the stand-by losses are reduced to a minimum. Like in FCCrM controllers, an internal circuitry allows near-unity power factor even when the switching frequency is reduced. Housed in a SO−10 package, the circuit also incorporates the features necessary for robust and compact PFC stages, with few external components. General Features • Near-unity Power Factor • Critical Conduction Mode (CrM) • Current Controlled Frequency Fold-back (CCFF): Low Frequency Operation is Forced at Low Current Levels • On-time Modulation to Maintain a Proper Current Shaping in CCFF Mode • Skip Mode Near the Line Zero Crossing • Fast Line/Load Transient Compensation (Dynamic Response Enhancer) • Valley Turn On • High Drive Capability: −500 mA/+800 mA • VCC Range: from 9.5 V to 35 V • Low Start-up Consumption • Six Versions: NCP1612A, B, A1, A2, A3 and B2 (see Table 1) • Line Range Detection • pfcOK Signal • This is a Pb-Free Device www.onsemi.com SOIC−10 CASE 751BQ MARKING DIAGRAM 10 1612x ALYW G 1 1612x A L Y W G = Specific Device Code x = A, A1, A2, A3, B or B2 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package PIN CONNECTIONS FOVP Feedback Vcontrol Vsense FFcontrol 1 (Top View) pfcOK VCC DRV GND CS/ZCD ORDERING INFORMATION See detailed ordering and shipping information on page 30 of this data sheet. Safety Features • Separate Pin for Fast Over-voltage Protection (FOVP) for Redundancy • Soft Over-voltage Protection • Brown-out Detection • Soft-start for Smooth Start-up Operation (A, A1, A2 and A3 Versions) • Over Current Limitation • Disable Protection if the Feedback is Not Connected • Thermal Shutdown • Latched Off Capability • Low Duty-cycle Operation if the Bypass Diode is shorted • Open Ground Pin Fault Monitoring • Saturated Inductor Protection • Detailed Safety Testing Analysis (Refer to Application Note AND9079/D) Typical Applications • PC Power Supplies • All Off Line Appliances Requiring Power Factor Correction © Semiconductor Components Industries, LLC, 2016 1 January, 2018 − Rev. 11 Publication Order Number: NCP1612/D NCP1612A, NCP1612B, NCP1612A1, NCP1612A2, NCP1612A3, NCP1612B2 Figure 1. Typical Application Schematic Table 1. FIVE NCP1612 VERSIONS Part Number Typical UVLO Hysteresis Condition for BUV Tripping (typical threshold) NCP1612A 1.5 V VFOVP < 76%.VREF NCP1612A1 1.5 V VFOVP < 40%.VREF NCP1612A2 1.5 V VFB < 76%.VREF NCP1612A3 1.5 V VFOVP < 40%.VREF NCP1612B 8.0 V VFOVP < 76%.VREF NCP1612B2* 8.0 V VFB < 76%.VREF *Please contact local sales representative for availability Maximum Dead-time (typical value) 48.5 ms 48.5 ms 48.5 ms 41.5 ms 48.5 ms 48.5 ms Condition for Latching-off (typical threshold) VpfcOK > 7.5 V VpfcOK > 7.5 V VFOVP > 107%.VREF VpfcOK > 7.5 V VpfcOK > 7.5 V VFOVP > 107%.VREF UVP2 if VFOVP


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