NB3V63143G

NB3V63143G 1.8 V Programmable OmniClock Generator with Single Ended (LVCMOS) and Differential (LVDS/HCSL) Outputs with Individual Output Enable and Individual VDDO www.onsemi.com The NB3V63143G, which is a member of the OmniClock family, is a one−time programmable (OTP), low power PLL−based clock generator that supports any output frequency from 8 kHz to 200 MHz. The device accepts fundamental mode parallel resonant crystal or a single ended (LVCMOS) reference clock as input. It generates either 1 QFN16 CASE 485AE three single ended (LVCMOS) outputs, or one single ended output and one differential (LVDS/HCSL) output. The output signals can be MARKING DIAGRAM modulated using the spread spectrum feature of the PLL (programmable spread spectrum type, deviation and rate) for applications demanding low electromagnetic interference (EMI). Individual output enable pins OE[2:0] are available to enable/disable 3V631 43Gxx ALYWG G the outputs. Individual output voltage pins VDDO[2:0] are available to independently set the output voltage of each output. Up to four different configurations can be written into the device memory. Two selection pins (SEL[1:0]) allow the user to select the configuration to use. Using the PLL bypass mode, it is possible to get a copy of the input clock on any or all of the outputs. The device can be powered 3V63143G xx A L Y = Specific Device Code = Specific Program Code (Default ‘00’ for Unprogrammed Part) = Assembly Location = Wafer Lot = Year ...