74HCT423

74HC423; 74HCT423 Dual retriggerable monostable multivibrator with reset Rev. 6 — 19 December 2011 Product data sheet 1. General description 74HC423; 74HCT423 are high-speed Si-gate CMOS devices that are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC423; 74HCT423 dual retriggerable monostable multivibrator with reset has two methods of output pulse width control. 1. The minimum pulse width is essentially determined by the selection of an external resistor (REXT) and capacitor (CEXT), see Section 12.1. 2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired. When nRD is LOW, it forces the nQ output LOW, the nQ output HIGH and also inhibits the triggering. Figure 10 and Figure 11 illustrate pulse control by reset. The nA and nB inputs’ Schmitt trigger action makes them highly tolerant to slower input rise and fall times. The 74HC423; 74HCT423 are identical to the 74HC123; 74HCT123 except that they cannot be triggered via the reset input. 2. Features and benefits  DC triggered from active HIGH or active LOW inputs  Retriggerable for very long pulses up to 100 % duty factor  Direct reset terminates output pulse  Schmitt-trigger action on all inputs except for the reset input  Complies wit...