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MBR2045CT Dataheets PDF



Part Number MBR2045CT
Manufacturers Silicon Standard
Logo Silicon Standard
Description 20A Dual Schottky Rectifiers
Datasheet MBR2045CT DatasheetMBR2045CT Datasheet (PDF)

MBR/B20xxCT Series 20A Dual Schottky Rectifiers PRODUCT SUMMARY Voltage ratings available from 35 to 60 Volts FEATURES Plastic packages have Underwriters Laboratory Flammability Classification 94V-0 Dual rectifier construction, positive center tap Metal-silicon junction, majority carrier conduction Low power loss, high efficiency Guardring for overvoltage protection For use in low voltage, high frequency inverters, free wheeling, and polarity protection applications MECHANICAL DATA High tem.

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MBR/B20xxCT Series 20A Dual Schottky Rectifiers PRODUCT SUMMARY Voltage ratings available from 35 to 60 Volts FEATURES Plastic packages have Underwriters Laboratory Flammability Classification 94V-0 Dual rectifier construction, positive center tap Metal-silicon junction, majority carrier conduction Low power loss, high efficiency Guardring for overvoltage protection For use in low voltage, high frequency inverters, free wheeling, and polarity protection applications MECHANICAL DATA High temperature soldering guaranteed: 250°C for 10 seconds, 0.25" (6.35mm) from case Case: JEDEC TO-220AB (MBR...) or ITO-220AB (MBRB...) molded plastic body - for dimensions, see page 3 Terminals: Matte-Sn plated leads, solderable per MIL-STD-750, method 2026 Polarity: As marked Mounting Position: Any Mounting Torque: 10 in-lbs maximum Weight: 0.08 ounce, 2.24 grams Pb-free; RoHS-compliant MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS Rating at 25°C ambient temperature unless otherwise specified. Single phase, half wave, 60 Hz, resistive or inductive load. For capacitive load, derate current by 20% Parameter Symbol MBR2035CT MBR2045CT MBRB2035CT MBRB2045CT MBR2050CT MBR2060CT MBRB2050CT MBRB2060CT Units Maximum repetitive peak reverse voltage Working peak reverse voltage Maximum DC blocking voltage Maximum average forward Total device rectified current at TC=135°C Per leg Peak repetitive forward current per leg at (rated V , sq. R wave, 20kHz) at TC=135oC Peak forward surge current 8.3ms single half sine-wave superimposed on rated load (JEDEC Method) per leg Peak repetitive reverse surge current per leg at tp = 2.0us, 1KHz Voltage rate of change (rated V ) R Maximum instantaneous forward voltage per leg (Note 1) Maximum reverse current at rated DC blocking voltage per leg (Note 1) at IF=10A, TC=25oC at IF=10A, TC=125oC at IF=20A, TC=25oC at IF=20A, TC=125oC TC=25oC TC=125oC Thermal resistance from junction to case per leg VRRM VRWM VDC IF(AV) IFRM IFSM IRRM dv/dt VF I R RθJC 35 45 50 60 35 45 50 60 35 45 50 60 20 10 20 150 1.0 0.5 10,000 0.57 0.84 0.72 0.1 15 2.0 0.80 0.70 0.95 0.85 0.15 150 Volts Volts Volts Amps Amps Amps Amps V/us Volt mA °C /W Operating junction temperature range Storage temperature range Notes: 1. Pulse test: 300us pulse width, 1% duty cycle TJ TSTG -55 to +150 -55 to +150 12/03/2006 Rev.4.01 www.SiliconStandard.com oC oC 1 of 3 RATINGS AND CHARACTERISTIC CURVES (TA = 25°C unless otherwise noted ) MBR/B20xxCT Series 12/03/2006 Rev.4.01 www.SiliconStandard.com 2 of 3 PHYSICAL DIMENSIONS ITO-220AB MBR/B20xxCT Series TO-220AB Dimensions in inches and (millimeters) Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 12/03/2006 Rev.4.01 www.SiliconStandard.com 3 of 3 .


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