Seiko Instruments Electronic Components Datasheet


S-1009

SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR


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S-1009 Series
www.sii-ic.com
© Seiko Instruments Inc., 2009-2012
SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE
DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
The S-1009 Series is a super high-accuracy voltage detector developed using CMOS technology. The detection voltage is
fixed internally with an accuracy of ±0.5%. It operates with super low current consumption of 270 nA typ.
The release signal can be delayed by setting a capacitor externally. Delay time accuracy is ±15%. Two output forms Nch
open-drain and CMOS output are available.
Compared with conventional CMOS voltage detectors, the S-1009 Series is the most suitable for the portable devices due
to the super-low current consumption, super high-accuracy and small packages.
„ Features
Detection voltage:
Detection voltage accuracy:
Current consumption:
Operation voltage range:
Hysteresis width:
Delay time accuracy:
Output form:
Operation temperature range:
Lead-free (Sn 100%), halogen-free
0.8 V to 4.6 V (0.1 V step)
±0.5% (2.4 V ≤ −VDET 4.6 V)
±12 mV (0.8 V ≤ −VDET < 2.4 V)
270 nA typ. (1.2 V ≤ −VDET < 2.3 V)
0.6 V to 10.0 V (CMOS output product)
5% ±1%
±15% (CD = 4.7 nF)
Nch open-drain output (active "L")
CMOS output (active "L")
Ta = 40°C to +85°C
„ Applications
Power monitor and reset for CPU and microcomputer
Constant voltage power monitor for TV, DVD recorder and home appliance
Power supply monitor for portable device such as notebook PC, digital still camera and mobile phone
„ Packages
SOT-23-5
SC-82AB
SNT-4A
Seiko Instruments Inc.
1


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
„ Block Diagrams
1. Nch open-drain output product
VDD
VSS
*1. Parasitic diode
2. CMOS output product
*1
VREF
+
Delay
circuit
*1
OUT
*1
CD
Figure 1
VDD
VSS
*1. Parasitic diode
*1
VREF
+
Delay
circuit
*1
*1
OUT
*1
CD
Figure 2
2 Seiko Instruments Inc.


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
„ Product Name Structure
Users can select the output form, detection voltage value, and package type for the S-1009 Series. Refer to "1.
Product name" regarding the contents of product name, "2. Packages" regarding the package drawings and "3.
Product name list" regarding details of product name.
1. Product name
S-1009 x xx I - xxxx U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
M5T1: SOT-23-5, Tape
N4T1: SC-82AB, Tape
I4T1: SNT-4A, Tape
Operation temperature
I: Ta = 40°C to +85°C
Detection voltage value
08 to 46
(e.g., when the detection voltage is 1.5 V, it is expressed as 15.)
Output form
N: Nch open-drain output (active "L")
C: CMOS output (active "L")
*1. Refer to the tape drawings.
2. Packages
Package Name
SOT-23-5
SC-82AB
SNT-4A
Table 1 Package Drawing Codes
Dimension
MP005-A-P-SD
NP004-A-P-SD
PF004-A-P-SD
Tape
MP005-A-C-SD
NP004-A-C-SD
NP004-A-C-S1
PF004-A-C-SD
Reel
MP005-A-R-SD
NP004-A-R-SD
PF004-A-R-SD
Land
PF004-A-L-SD
Seiko Instruments Inc.
3


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
3. Product name list
3. 1 Nch open-drain output product
Detection Voltage
0.8 V ± 12 mV
0.9 V ± 12 mV
1.0 V ± 12 mV
1.1 V ± 12 mV
1.2 V ± 12 mV
1.3 V ± 12 mV
1.4 V ± 12 mV
1.5 V ± 12 mV
1.6 V ± 12 mV
1.7 V ± 12 mV
1.8 V ± 12 mV
1.9 V ± 12 mV
2.0 V ± 12 mV
2.1 V ± 12 mV
2.2 V ± 12 mV
2.3 V ± 12 mV
2.4 V ± 0.5%
2.5 V ± 0.5%
2.6 V ± 0.5%
2.7 V ± 0.5%
2.8 V ± 0.5%
2.9 V ± 0.5%
3.0 V ± 0.5%
3.1 V ± 0.5%
3.2 V ± 0.5%
3.3 V ± 0.5%
3.4 V ± 0.5%
3.5 V ± 0.5%
3.6 V ± 0.5%
3.7 V ± 0.5%
3.8 V ± 0.5%
3.9 V ± 0.5%
4.0 V ± 0.5%
4.1 V ± 0.5%
4.2 V ± 0.5%
4.3 V ± 0.5%
4.4 V ± 0.5%
4.5 V ± 0.5%
4.6 V ± 0.5%
Table 2
SOT-23-5
S-1009N08I-M5T1U
S-1009N09I-M5T1U
S-1009N10I-M5T1U
S-1009N11I-M5T1U
S-1009N12I-M5T1U
S-1009N13I-M5T1U
S-1009N14I-M5T1U
S-1009N15I-M5T1U
S-1009N16I-M5T1U
S-1009N17I-M5T1U
S-1009N18I-M5T1U
S-1009N19I-M5T1U
S-1009N20I-M5T1U
S-1009N21I-M5T1U
S-1009N22I-M5T1U
S-1009N23I-M5T1U
S-1009N24I-M5T1U
S-1009N25I-M5T1U
S-1009N26I-M5T1U
S-1009N27I-M5T1U
S-1009N28I-M5T1U
S-1009N29I-M5T1U
S-1009N30I-M5T1U
S-1009N31I-M5T1U
S-1009N32I-M5T1U
S-1009N33I-M5T1U
S-1009N34I-M5T1U
S-1009N35I-M5T1U
S-1009N36I-M5T1U
S-1009N37I-M5T1U
S-1009N38I-M5T1U
S-1009N39I-M5T1U
S-1009N40I-M5T1U
S-1009N41I-M5T1U
S-1009N42I-M5T1U
S-1009N43I-M5T1U
S-1009N44I-M5T1U
S-1009N45I-M5T1U
S-1009N46I-M5T1U
SC-82AB
S-1009N08I-N4T1U
S-1009N09I-N4T1U
S-1009N10I-N4T1U
S-1009N11I-N4T1U
S-1009N12I-N4T1U
S-1009N13I-N4T1U
S-1009N14I-N4T1U
S-1009N15I-N4T1U
S-1009N16I-N4T1U
S-1009N17I-N4T1U
S-1009N18I-N4T1U
S-1009N19I-N4T1U
S-1009N20I-N4T1U
S-1009N21I-N4T1U
S-1009N22I-N4T1U
S-1009N23I-N4T1U
S-1009N24I-N4T1U
S-1009N25I-N4T1U
S-1009N26I-N4T1U
S-1009N27I-N4T1U
S-1009N28I-N4T1U
S-1009N29I-N4T1U
S-1009N30I-N4T1U
S-1009N31I-N4T1U
S-1009N32I-N4T1U
S-1009N33I-N4T1U
S-1009N34I-N4T1U
S-1009N35I-N4T1U
S-1009N36I-N4T1U
S-1009N37I-N4T1U
S-1009N38I-N4T1U
S-1009N39I-N4T1U
S-1009N40I-N4T1U
S-1009N41I-N4T1U
S-1009N42I-N4T1U
S-1009N43I-N4T1U
S-1009N44I-N4T1U
S-1009N45I-N4T1U
S-1009N46I-N4T1U
SNT-4A
S-1009N08I-I4T1U
S-1009N09I-I4T1U
S-1009N10I-I4T1U
S-1009N11I-I4T1U
S-1009N12I-I4T1U
S-1009N13I-I4T1U
S-1009N14I-I4T1U
S-1009N15I-I4T1U
S-1009N16I-I4T1U
S-1009N17I-I4T1U
S-1009N18I-I4T1U
S-1009N19I-I4T1U
S-1009N20I-I4T1U
S-1009N21I-I4T1U
S-1009N22I-I4T1U
S-1009N23I-I4T1U
S-1009N24I-I4T1U
S-1009N25I-I4T1U
S-1009N26I-I4T1U
S-1009N27I-I4T1U
S-1009N28I-I4T1U
S-1009N29I-I4T1U
S-1009N30I-I4T1U
S-1009N31I-I4T1U
S-1009N32I-I4T1U
S-1009N33I-I4T1U
S-1009N34I-I4T1U
S-1009N35I-I4T1U
S-1009N36I-I4T1U
S-1009N37I-I4T1U
S-1009N38I-I4T1U
S-1009N39I-I4T1U
S-1009N40I-I4T1U
S-1009N41I-I4T1U
S-1009N42I-I4T1U
S-1009N43I-I4T1U
S-1009N44I-I4T1U
S-1009N45I-I4T1U
S-1009N46I-I4T1U
4 Seiko Instruments Inc.


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
3. 2 CMOS output product
Detection Voltage
0.8 V ± 12 mV
0.9 V ± 12 mV
1.0 V ± 12 mV
1.1 V ± 12 mV
1.2 V ± 12 mV
1.3 V ± 12 mV
1.4 V ± 12 mV
1.5 V ± 12 mV
1.6 V ± 12 mV
1.7 V ± 12 mV
1.8 V ± 12 mV
1.9 V ± 12 mV
2.0 V ± 12 mV
2.1 V ± 12 mV
2.2 V ± 12 mV
2.3 V ± 12 mV
2.4 V ± 0.5%
2.5 V ± 0.5%
2.6 V ± 0.5%
2.7 V ± 0.5%
2.8 V ± 0.5%
2.9 V ± 0.5%
3.0 V ± 0.5%
3.1 V ± 0.5%
3.2 V ± 0.5%
3.3 V ± 0.5%
3.4 V ± 0.5%
3.5 V ± 0.5%
3.6 V ± 0.5%
3.7 V ± 0.5%
3.8 V ± 0.5%
3.9 V ± 0.5%
4.0 V ± 0.5%
4.1 V ± 0.5%
4.2 V ± 0.5%
4.3 V ± 0.5%
4.4 V ± 0.5%
4.5 V ± 0.5%
4.6 V ± 0.5%
Table 3
SOT-23-5
S-1009C08I-M5T1U
S-1009C09I-M5T1U
S-1009C10I-M5T1U
S-1009C11I-M5T1U
S-1009C12I-M5T1U
S-1009C13I-M5T1U
S-1009C14I-M5T1U
S-1009C15I-M5T1U
S-1009C16I-M5T1U
S-1009C17I-M5T1U
S-1009C18I-M5T1U
S-1009C19I-M5T1U
S-1009C20I-M5T1U
S-1009C21I-M5T1U
S-1009C22I-M5T1U
S-1009C23I-M5T1U
S-1009C24I-M5T1U
S-1009C25I-M5T1U
S-1009C26I-M5T1U
S-1009C27I-M5T1U
S-1009C28I-M5T1U
S-1009C29I-M5T1U
S-1009C30I-M5T1U
S-1009C31I-M5T1U
S-1009C32I-M5T1U
S-1009C33I-M5T1U
S-1009C34I-M5T1U
S-1009C35I-M5T1U
S-1009C36I-M5T1U
S-1009C37I-M5T1U
S-1009C38I-M5T1U
S-1009C39I-M5T1U
S-1009C40I-M5T1U
S-1009C41I-M5T1U
S-1009C42I-M5T1U
S-1009C43I-M5T1U
S-1009C44I-M5T1U
S-1009C45I-M5T1U
S-1009C46I-M5T1U
SC-82AB
S-1009C08I-N4T1U
S-1009C09I-N4T1U
S-1009C10I-N4T1U
S-1009C11I-N4T1U
S-1009C12I-N4T1U
S-1009C13I-N4T1U
S-1009C14I-N4T1U
S-1009C15I-N4T1U
S-1009C16I-N4T1U
S-1009C17I-N4T1U
S-1009C18I-N4T1U
S-1009C19I-N4T1U
S-1009C20I-N4T1U
S-1009C21I-N4T1U
S-1009C22I-N4T1U
S-1009C23I-N4T1U
S-1009C24I-N4T1U
S-1009C25I-N4T1U
S-1009C26I-N4T1U
S-1009C27I-N4T1U
S-1009C28I-N4T1U
S-1009C29I-N4T1U
S-1009C30I-N4T1U
S-1009C31I-N4T1U
S-1009C32I-N4T1U
S-1009C33I-N4T1U
S-1009C34I-N4T1U
S-1009C35I-N4T1U
S-1009C36I-N4T1U
S-1009C37I-N4T1U
S-1009C38I-N4T1U
S-1009C39I-N4T1U
S-1009C40I-N4T1U
S-1009C41I-N4T1U
S-1009C42I-N4T1U
S-1009C43I-N4T1U
S-1009C44I-N4T1U
S-1009C45I-N4T1U
S-1009C46I-N4T1U
SNT-4A
S-1009C08I-I4T1U
S-1009C09I-I4T1U
S-1009C10I-I4T1U
S-1009C11I-I4T1U
S-1009C12I-I4T1U
S-1009C13I-I4T1U
S-1009C14I-I4T1U
S-1009C15I-I4T1U
S-1009C16I-I4T1U
S-1009C17I-I4T1U
S-1009C18I-I4T1U
S-1009C19I-I4T1U
S-1009C20I-I4T1U
S-1009C21I-I4T1U
S-1009C22I-I4T1U
S-1009C23I-I4T1U
S-1009C24I-I4T1U
S-1009C25I-I4T1U
S-1009C26I-I4T1U
S-1009C27I-I4T1U
S-1009C28I-I4T1U
S-1009C29I-I4T1U
S-1009C30I-I4T1U
S-1009C31I-I4T1U
S-1009C32I-I4T1U
S-1009C33I-I4T1U
S-1009C34I-I4T1U
S-1009C35I-I4T1U
S-1009C36I-I4T1U
S-1009C37I-I4T1U
S-1009C38I-I4T1U
S-1009C39I-I4T1U
S-1009C40I-I4T1U
S-1009C41I-I4T1U
S-1009C42I-I4T1U
S-1009C43I-I4T1U
S-1009C44I-I4T1U
S-1009C45I-I4T1U
S-1009C46I-I4T1U
Seiko Instruments Inc.
5


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
„ Pin Configurations
1. SOT-23-5
Top view
54
123
Figure 3
Table 4
Pin No.
Symbol
Description
1 OUT
Voltage detection output pin
2 VDD
Input voltage pin
3 VSS
4 NC*1
GND pin
No connection
5 CD
Connection pin for delay capacitor
*1. The NC pin is electrically open.
The NC pin can be connected to the VDD pin or the VSS pin.
2. SC-82AB
Top view
43
12
Figure 4
3. SNT-4A
Top view
14
23
Figure 5
Pin No.
1
2
3
4
Symbol
VSS
VDD
CD
OUT
Table 5
Description
GND pin
Input voltage pin
Connection pin for delay capacitor
Voltage detection output pin
Pin No.
1
2
3
4
Symbol
VSS
OUT
CD
VDD
Table 6
Description
GND pin
Voltage detection output pin
Connection pin for delay capacitor
Input voltage pin
6 Seiko Instruments Inc.


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
„ Absolute Maximum Ratings
Table 7
Item Symbol
Power supply voltage
CD pin input voltage
Output voltage
Nch open-drain output product
CMOS output product
VDD VSS
VCD
VOUT
Output current
SOT-23-5
IOUT
Power dissipation
SC-82AB
SNT-4A
PD
Operation ambient temperature
Topr
Storage temperature
Tstg
*1. When mounted on board
[Mounted board]
(1) Board size: 114.3 mm × 76.2 mm × t1.6 mm
(2) Name:
JEDEC STANDARD51-7
(Ta = +25°C unless otherwise specified)
Absolute Maximum Rating
Unit
12 V
VSS 0.3 to VDD + 0.3
VSS 0.3 to 12.0
VSS 0.3 to VDD + 0.3
50
600*1
350*1
300*1
V
V
V
mA
mW
mW
mW
40 to +85
40 to +125
°C
°C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
700
600
500 SOT-23-5
400
SC-82AB
300
200
SNT-4A
100
0
0 50 100 150
Ambient Temperature (Ta) [°C]
Figure 6 Power Dissipation of Package (When Mounted on Board)
Seiko Instruments Inc.
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
„ Electrical Characteristics
1. Nch open-drain output product
Table 8
(Ta = +25°C unless otherwise specified)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Test
Circuit
Detection voltage*1 VDET
0.8 V ≤ −VDET < 2.4 V
2.4 V ≤ −VDET 4.6 V
VDET(S)
0.012
VDET(S)
VDET(S)
+ 0.012
VDET(S)
× 0.995
VDET(S)
VDET(S)
× 1.005
V
V
1
1
Hysteresis width
VHYS
VDET VDET VDET
× 0.04 × 0.05 × 0.06
V
1
Current
consumption
ISS
Operation voltage VDD
Output current
IOUT
0.8 V ≤ −VDET < 1.2 V
0.30 0.90 μA 2
VDD = +VDET + 0.6 V
1.2 V ≤ −VDET < 2.3 V
2.3 V ≤ −VDET < 3.6 V
0.27 0.90 μA 2
0.42 0.90 μA 2
3.6 V ≤ −VDET 4.6 V
0.39 0.90 μA 2
0.7 10.0 V 1
Output transistor
Nch
VDS*2 = 0.5 V
VDD = 0.7 V
S-1009N08 to 14
VDD = 1.2 V
S-1009N15 to 46
VDD = 2.4 V
S-1009N27 to 46
0.14
0.73
1.47
0.40
1.33
2.39
mA 3
mA 3
mA 3
Output transistor
Leakage current
Delay time
Detection voltage
temperature
coefficient*3
ILEAK
tD
Δ−VDET
ΔTa • −VDET
Nch
VDD = 10.0 V, VOUT = 10.0 V
CD = 4.7 nF
0.8 V ≤ −VDET < 0.9 V
Ta = 40°C to +85°C 0.9 V ≤ −VDET < 1.2 V
1.2 V ≤ −VDET 4.6 V
22.1
26.0
±180
±120
±100
0.08 μA 3
29.9
±430
±370
±350
ms
ppm/°C
ppm/°C
ppm/°C
4
1
1
1
*1. VDET: Actual detection voltage value, VDET(S): Set detection voltage value (the center value of the detection voltage
range in Table 2.)
*2. VDS: Drain-to-source voltage of the output transistor
*3. The temperature change of the detection voltage [mV/°C] is calculated by using the following equation.
Δ − VDET
ΔTa
[mV/°C]*1 = VDET(S) (typ.)[V]*2 ×
Δ − VDET
ΔTa • −VDET
[ppm/°C]*3 ÷ 1000
*1. Temperature change of the detection voltage
*2. Set detection voltage
*3. Detection voltage temperature coefficient
8 Seiko Instruments Inc.


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
2. CMOS output product
Table 9
(Ta = +25°C unless otherwise specified)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Test
Circuit
Detection voltage*1 VDET
0.8 V ≤ −VDET < 2.4 V
2.4 V ≤ −VDET 4.6 V
VDET(S)
0.012
VDET(S)
VDET(S)
+ 0.012
VDET(S)
× 0.995
VDET(S)
VDET(S)
× 1.005
V
V
1
1
Hysteresis width
VHYS
VDET VDET VDET
× 0.04 × 0.05 × 0.06
V
1
Current
consumption
ISS
Operation voltage VDD
Output current
IOUT
0.8 V ≤ −VDET < 1.2 V
0.30 0.90 μA 2
VDD = +VDET + 0.6 V
1.2 V ≤ −VDET < 2.3 V
2.3 V ≤ −VDET < 3.6 V
0.27 0.90 μA 2
0.42 0.90 μA 2
3.6 V ≤ −VDET 4.6 V
0.39 0.90 μA 2
0.6 10.0 V 1
Output transistor
Nch
VDS*2 = 0.5 V
VDD = 0.7 V
S-1009C08 to 14
VDD = 1.2 V
S-1009C15 to 46
VDD = 2.4 V
S-1009C27 to 46
0.14
0.73
1.47
0.40
1.33
2.39
mA 3
mA 3
mA 3
Output transistor
Pch
VDS*2 = 0.5 V
VDD = 4.8 V
S-1009C08 to 39
VDD = 6.0 V
S-1009C40 to 46
1.62
1.78
2.60
2.86
mA 5
mA 5
Delay time
Detection voltage
temperature
coefficient*3
tD
Δ−VDET
ΔTa • −VDET
CD = 4.7 nF
Ta = 40°C to +85°C
0.8 V ≤ −VDET < 0.9 V
0.9 V ≤ −VDET < 1.2 V
1.2 V ≤ −VDET 4.6 V
22.1
26.0
±180
±120
±100
29.9
±430
±370
±350
ms
ppm/°C
ppm/°C
ppm/°C
4
1
1
1
*1. VDET: Actual detection voltage value, VDET(S): Set detection voltage value (the center value of the detection voltage
range in Table 3.)
*2. VDS: Drain-to-source voltage of the output transistor
*3. The temperature change of the detection voltage [mV/°C] is calculated by using the following equation.
Δ − VDET
ΔTa
[mV/°C]*1 = VDET(S) (typ.)[V]*2 ×
Δ − VDET
ΔTa • −VDET
[ppm/°C]*3 ÷ 1000
*1. Temperature change of the detection voltage
*2. Set detection voltage
*3. Detection voltage temperature coefficient
Seiko Instruments Inc.
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
„ Test Circuits
+
A
VDD
VDD
+
V OUT
R*1
100 kΩ
VDD
VDD
VSS CD
+
V
VSS
OUT
CD
*1. R is unnecessary for CMOS output product.
Figure 7 Test Circuit 1
Figure 8 Test Circuit 2
VDD
VDD
VDD +
+
V
OUT
A
P.G.
OUT
VSS CD
+ VDS
VSS CD
V
R*1
100 kΩ
Oscilloscope
Figure 9 Test Circuit 3
*1. R is unnecessary for CMOS output product.
Figure 10 Test Circuit 4
+
V
VDS
VDD
VDD +
V OUT
+
A
VSS CD
Figure 11 Test Circuit 5
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
„ Timing Charts
1. Nch open-drain output product
Hysteresis width
(VHYS)
VDD
VDD
Release voltage (+VDET)
Detection voltage (VDET)
Minimum operation voltage
VSS
Output from OUT pin
VDD
CD OUT
VSS
R
100 kΩ
+
V
VSS
tD
Figure 12
2. CMOS output product
Hysteresis width
(VHYS)
VDD
VDD
Release voltage (+VDET)
Detection voltage (VDET)
Minimum operation voltage
VSS
Output from OUT pin
VDD
CD OUT
VSS
+
V
VSS
tD
Remark When VDD is the minimum operation voltage or less, the output voltage from the OUT pin is indefinite
in the shaded area.
Figure 13
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
„ Operation
1. Basic operation: CMOS output (active "L") product
(1) When the power supply voltage (VDD) is the release voltage (+VDET) or more, the Nch transistor is OFF and
the Pch transistor is ON to output VDD ("H"). Since the Nch transistor N1 in Figure 14 is OFF, the comparator
input voltage is
(RB + RC ) VDD
RA + RB + RC
.
(2) Although VDD decreases to +VDET or less, VDD is output when VDD is the detection voltage (VDET) or more.
When VDD decreases to VDET or less (point A in Figure 15), the Nch transistor is ON and the Pch transistor
is OFF so that VSS is output. At this time, the Nch transistor N1 in Figure 14 is turned on, and the input
voltage to the comparator is
RB VDD
RA + RB
.
(3) The output is indefinite by decreasing VDD to the IC’s minimum operation voltage or less. If the output is
pulled up, it will be VDD.
(4) VSS is output by increasing VDD to the minimum operation voltage or more. Although VDD exceeds VDET and
VDD is less than +VDET, the output is VSS.
(5) When increasing VDD to +VDET or more (point B in Figure 15), the Nch transistor is OFF and the Pch
transistor is ON so that VDD is output. At this time, VDD is output from the OUT pin after the passage of the
delay time (tD).
VDD
VSS
RA
*1
RB
VREF
RC
+
N1
Delay
circuit
Pch
Nch
*1
CD
*1
OUT
*1
CD
*1. Parasiteic diode
Figure 14 Operation 1
(1) (2) (3) (4)
Hysteresis width
(VHYS)
A
B
(5)
VDD
Release voltage (+VDET)
Detection voltage (VDET)
Minimum operation voltage
VSS
VDD
Output from OUT pin
VSS
tD
Figure 15 Operation 2
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
2. Delay circuit
The delay circuit delays the output signal to the OUT pin from the time at which the power supply voltage (VDD)
exceeds the release voltage (+VDET) when VDD is turned on. The output signal is not delayed when VDD decreases
to the detection voltage (VDET) or less (refer to "Figure 15 Operation 2").
The delay time (tD) is determined by the time constant of the built-in constant current (approx. 100 nA) and the
attached delay capacitor (CD), or the delay time (tD0) when the CD pin is open, and calculated from the following
equation. When the CD value is sufficiently large, the tD0 value can be disregarded.
tD [ms] = Delay coefficient × CD [nF] + tD0 [ms]
Operation
Temperature
Ta = +85°C
Ta = +25°C
Ta = 40°C
Table 10 Delay Coefficient
Delay Coefficient
Min. Typ.
2.82 4.20
4.70 5.47
5.64 8.40
Max.
5.72
6.24
12.01
Operation Temperature
Ta = 40°C to +85°C
Table 11 Delay Time
Min.
0.01 ms
Delay Time (tD0)
Typ.
0.10 ms
Max.
0.24 ms
Caution 1.
When the CD pin is open, a double pulse shown in Figure 16 may appear at release.
To avoid the double pulse, attach 100 pF or larger capacitor to the CD pin. Do not apply
voltage to the CD pin from the exterior.
VOUT
Figure 16
Time
2. Mounted board layout should be made in such a way that no current flows into or flows from
the CD pin since the impedance of the CD pin is high, otherwise correct delay time cannot be
provided.
3. There is no limit for the capacitance of CD as long as the leakage current of the capacitor can
be ignored against the built-in constant current value. Leakage current causes deviation in
delay time. When the leakage current is larger than the built-in constant current, no release
takes place.
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
3. Other characteristics
3. 1 Temperature characteristics of detection voltage
The shaded area in Figure 17 shows the temperature characteristics of detection voltage in the operation
temperature range.
VDET [V]
+0.945 mV/°C
VDET25*1
0.945 mV/°C
40 +25 +85 Ta [°C]
*1. VDET25 is an actual detection voltage value at Ta = +25°C.
Figure 17 Temperature Characteristics of Detection Voltage (Example for VDET = 2.7 V)
3. 2 Temperature characteristics of release voltage
The temperature change
Δ + VDET
ΔTa
of the release voltage is calculated by using the temperature change
Δ − VDET
ΔTa
of the detection voltage as follows:
Δ + VDET
ΔTa
=
+VDET
VDET
×
Δ − VDET
ΔTa
The temperature change of the release voltage and the detection voltage has the same sign consequently.
3. 3 Temperature characteristics of hysteresis voltage
The temperature change of the hysteresis voltage is expressed as
Δ + VDET
ΔTa
Δ − VDET
ΔTa
and is calculated as
follows:
Δ + VDET
ΔTa
Δ − VDET
ΔTa
=
VHYS
VDET
×
Δ − VDET
ΔTa
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
„ Standard Circuit
CD*2
VDD
CD OUT
VSS
R*1
100 kΩ
*1. R is unnecessary for CMOS output product.
*2. The delay capacitor (CD) should be connected directly to the CD pin and the VSS pin.
Figure 18
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
„ Explanation of Terms
1. Detection voltage (VDET)
The detection voltage is a voltage at which the output in Figure 21 turns to "L". The detection voltage varies slightly
among products of the same specification. The variation of detection voltage between the specified minimum
(VDET min.) and the maximum (VDET max.) is called the detection voltage range (refer to Figure 19).
Example: In the S-1009C15, the detection voltage is either one in the range of 1.488 V ≤ −VDET 1.512 V.
This means that some S-1009C15 have VDET = 1.488 V and some have VDET = 1.512 V.
2. Release voltage (+VDET)
The release voltage is a voltage at which the output in Figure 21 turns to "H". The release voltage varies slightly
among products of the same specification. The variation of release voltages between the specified minimum (+VDET
min.) and the maximum (+VDET max.) is called the release voltage range (refer to Figure 20). The range is
calculated from the actual detection voltage (VDET) of a product and is in the range of VDET × 1.04 ≤ +VDET ≤ −VDET
× 1.06.
Example: For the S-1009C15, the release voltage is either one in the range of 1.548 V ≤ +VDET 1.602 V.
This means that some S-1009C15 have +VDET = 1.548 V and some have +VDET = 1.602 V.
VDD
VDET max.
VDET min.
Detection voltage
Detection voltage
range
Release voltage
+VDET max.
+VDET min.
VDD
Release voltage
range
OUT
Figure 19 Detection Voltage
OUT
Delay time
Figure 20 Release Voltage
VDD + VDD OUT
V VSS CD
CD
R*1
100 kΩ
+
V
*1. R is unnecessary for CMOS output product.
Figure 21 Test Circuit of Detection Voltage and Release Voltage
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
2. Hysteresis width (VHYS)
The hysteresis width is the voltage difference between the detection voltage and the release voltage (the voltage at
point B the voltage at point A = VHYS in "Figure 15 Operation 2"). Setting the hysteresis width between the
detection voltage and the release voltage, prevents malfunction caused by noise on the input voltage.
3. Delay time (tD)
The delay time in the S-1009 Series is a period from the input voltage to the VDD pin exceeding the release voltage
(+VDET) until the output from the OUT pin inverts. The delay time changes according to the delay capacitor (CD).
VDD
+VDET
OUT
tD
Figure 22 Delay Time
4. Feed-through current
Feed-through current is a current that flows instantaneously at the time of detection and release of a voltage
detector. The feed-through current is large in CMOS output product, small in Nch open-drain output product.
5. Oscillation
In applications where a resistor is connected to the voltage detector input (Figure 23), taking a CMOS active "L"
product for example, the feed-through current which is generated when the output goes from "L" to "H" (release)
causes a voltage drop equal to [feed-through current] × [input resistance] across the resistor. When the input
voltage drops below the detection voltage (VDET) as a result, the output voltage goes to low level. In this state, the
feed-through current stops and its resultant voltage drop disappears, and the output goes from "L" to "H". The
feed-through current is then generated again, a voltage drop appears, and repeating the process finally induces
oscillation.
VDD
RA
VIN
S-1009C
OUT
RB
VSS
Figure 23 Example for Bad Implementation Due to Detection Voltage Change
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
„ Precautions
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
In CMOS output product of the S-1009 Series, the feed-through current flows at the detection and the release. If the
input impedance is high, oscillation may occur due to the voltage drop by the feed-through current during releasing.
In CMOS output product oscillation may occur when a pull-down resistor is used, and falling speed of the power
supply voltage (VDD) is slow near the detection voltage.
When designing for mass production using an application circuit described herein, the product deviation and
temperature characteristics of the external parts should be taken into consideration. SII shall not bear any
responsibility for patent infringements related to products using the circuits described herein.
SII claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
„ Characteristics (Typical Data)
1. Detection voltage (VDET) vs. Temperature (Ta)
S-1009N08
0.90
0.85
+VDET
S-1009N11
1.20
1.15
0.80
0.75
VDET
1.10
1.05
0.70
40 25
0 25 50
Ta [°C]
75 85
1.00
40 25
S-1009N12
1.40
S-1009N46
5.00
1.30
1.20
1.10
+VDET
VDET
4.80
4.60
4.40
1.00
40 25
0 25
Ta [°C]
50
75 85
4.20
40 25
2. Hysteresis width (VHYS) vs. Temperature (Ta)
S-1009N08
8
7
6
5
4
3
40 25
0 25
Ta [°C]
50
75 85
S-1009N11
8
7
6
5
4
3
40 25
S-1009N12
8
7
6
5
4
3
40 25
0 25
Ta [°C]
50
75 85
S-1009N46
8
7
6
5
4
3
40 25
+VDET
VDET
0 25 50
Ta [°C]
+VDET
VDET
0 25 50
Ta [°C]
0 25 50
Ta [°C]
0 25 50
Ta [°C]
75 85
75 85
75 85
75 85
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
3. Current consumption (ISS) vs. Input voltage (VDD)
S-1009C08
1.50
Ta = +25°C
S-1009C11
1.00
Ta = +25°C
1.25
0.75
1.00
0.75 0.50
0.50
0.25
0.25
0
0 2 4 6 8 10
VDD [V]
0
0 2 4 6 8 10
VDD [V]
S-1009C12
1.0
0.75
0.50
Ta = +25°C
S-1009C46
1.0
0.75
0.50
Ta = +25°C
0.25
0
0 2 4 6 8 10
VDD [V]
0.25
0
0 2 4 6 8 10
VDD [V]
4. Current consumption (ISS) vs. Temperature (Ta)
S-1009N08
1.00
VDD = +VDET + 0.6 V
S-1009N11
1.00
0.75 0.75
0.50 0.50
VDD = +VDET + 0.6 V
0.25 0.25
0
40 25
0 25
Ta [°C]
50
75 85
0
40 25
0 25 50
Ta [°C]
75 85
S-1009N12
1.00
VDD = +VDET + 0.6 V
S-1009N46
1.00
VDD = +VDET + 0.6 V
0.75 0.75
0.50 0.50
0.25 0.25
0
40 25
0 25 50
Ta [°C]
75 85
0
40 25
0 25 50
Ta [°C]
75 85
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
5. Nch transistor output current (IOUT) vs. VDS
S-1009N46
15.0
12.5
Ta = +25°C
VDD = 3.6 V
10.0
7.5 2.4 V
5.0
2.5
0
0
1.2 V
1.0 V
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VDS [V]
6. Pch transistor output current (IOUT) vs. VDS
S-1009C08
40.0
Ta = +25°C
VDD = 8.4 V
30.0
7.2 V
20.0 6.0 V
10.0
0
0
4.8 V
3.6 V
2.4 V
1.2 V
2.0 4.0 6.0 8.0 10.0
VDS [V]
7. Nch transistor output current (IOUT) vs.
Input voltage (VDD)
S-1009N46
4.0
Ta = 40°C
VDS = 0.5 V
3.0
2.0
+25°C
1.0 +85°C
0
0 1.0 2.0 3.0 4.0 5.0 6.0
VDD [V]
8. Pch transistor output current (IOUT) vs.
Input voltage (VDD)
S-1009C08
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
Ta = 40°C
VDS = 0.5 V
+25°C
+85°C
2 4 6 8 10
VDD [V]
Remark VDS: Drain-to-source voltage of the output transistor
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
9. Minimum operation voltage (VOUT) vs. Input voltage (VDD)
S-1009N08
1.2
Pull-up to VDD
Pull-up resistance: 100 kΩ
S-1009N11
1.4
1.0
0.8
0.6
0.4
0.2
0
0
Ta = 40°C
+25°C
+85°C
0.2 0.4 0.6 0.8 1.0
1.2
1.0
0.8
0.6
0.4
0.2
0
0
VDD [V]
Pull-up to VDD
Pull-up resistance: 100 kΩ
Ta = 40°C
+25°C
+85°C
0.2 0.4 0.6 0.8 1.0 1.2
VDD [V]
S-1009N12
1.6
Pull-up to VDD
Pull-up resistance: 100 kΩ
1.2
0.8
0.4
0
0
Ta = 40°C
+25°C
+85°C
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VDD [V]
S-1009N46
6.0
5.0
4.0
3.0
2.0
1.0
0
0
Pull-up to VDD
Pull-up resistance: 100 kΩ
Ta = 40°C
+25°C
+85°C
1.0 2.0 3.0 4.0 5.0
VDD [V]
S-1009N08
12.0
10.0
8.0
6.0
4.0
2.0
0
0
Pull-up to 10 V
Pull-up resistance: 100 kΩ
Ta = 40°C
+25°C
+85°C
0.2 0.4 0.6 0.8 1.0
VDD [V]
S-1009N11
12.0
10.0
8.0
6.0
4.0
2.0
0
0
Pull-up to 10 V
Pull-up resistance: 100 kΩ
Ta = 40°C
+25°C
+85°C
0.2 0.4 0.6 0.8 1.0 1.2
VDD [V]
S-1009N12
12.0
10.0
8.0
6.0
4.0
2.0
0
0
Pull-up to 10 V
Pull-up resistance: 100 kΩ
Ta = 40°C
+25°C
+85°C
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VDD [V]
S-1009N46
12.0
10.0
8.0
6.0
4.0
2.0
0
0
Pull-up to 10 V
Pull-up resistance: 100 kΩ
Ta = 40°C
+25°C
+85°C
1.0 2.0 3.0 4.0 5.0
VDD [V]
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
10. Dynamic response vs. Output pin capacitance (COUT) (CD pin; open)
S-1009C08
1
S-1009N08
10
tPLH
0.1
1
0.01
tPHL
0.1
0.01
tPLH
tPHL
0.001
0.00001 0.0001 0.001 0.01
Output pin capacitance [μF]
0.1
0.001
0.00001 0.0001 0.001 0.01
Output pin capacitance [μF]
S-1009C11
1
0.1
0.01
tPLH
tPHL
S-1009N11
10
1
0.1
0.01
tPLH
tPHL
0.001
0.00001 0.0001 0.001
0.01
Output pin capacitance [μF]
0.1
0.001
0.00001 0.0001 0.001
0.01
Output pin capacitance [μF]
S-1009C12
1
0.1
0.01
tPLH
tPHL
S-1009N12
10
1
0.1
0.01
tPLH
tPHL
0.001
0.00001 0.0001 0.001 0.01
Output pin capacitance [μF]
0.1
0.001
0.00001 0.0001 0.001 0.01
Output pin capacitance [μF]
S-1009C46
1
0.1
tPLH
0.01
tPHL
0.001
0.00001 0.0001 0.001
0.01
Output pin capacitance [μF]
0.1
S-1009N46
10
1
tPLH
0.1
0.01
tPHL
0.001
0.00001 0.0001 0.001
0.01
Output pin capacitance [μF]
0.1
0.1
0.1
0.1
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
VIH*1
Input voltage
VIL*2
VDD*3
Output voltage
1 μs
tPHL
1 μs
R*1
tPLH
VDD + VDD OUT
100 kΩ
VDD*3 × 90%
V VSS CD
COUT
VDD1*1
+
V
VDD*3 × 10%
*1. VIH = 10 V
*2. VIL = 0.7 V
*3. CMOS output product: VDD
Nch open-drain product: VDD1
Figure 24 Test Condition of Response Time
*1. R and VDD1 are unnecessary for CMOS output
product.
Figure 25 Test Circuit of Response Time
Caution
1. The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
2. When the CD pin is open, a double pulse may appear at release.
To avoid the double pulse, attach 100 pF or more capacitor to the CD pin.
Response time when detecting (tPHL) is not affected by CD pin capacitance. Besides, response
time when releasing (tPLH) can be set the delay time by attaching the CD pin.
Refer to "11. Delay time (tD) vs. CD pin capacitance (CD) (without output pin capacitance)" for
details.
11. Delay time (tD) vs. CD pin capacitance (CD) (without output pin capacitance)
S-1009N08
10000
Ta = +25°C
S-1009N11
10000
1000
1000
100 100
10 10
11
0.1
0.1
1 10 100 1000
CD [nF]
0.1
0.1
1 10
CD [nF]
Ta = +25°C
100 1000
S-1009N12
10000
1000
100
10
1
0.1
0.1
Ta = +25°C
1 10 100 1000
CD [nF]
S-1009N46
10000
1000
100
10
1
0.1
0.1
Ta = +25°C
1 10 100 1000
CD [nF]
24 Seiko Instruments Inc.


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
12. Delay time (tD) vs. Temperature (Ta)
S-1009N08
50
CD = 4.7 nF
40
30
20
10
0
40 25
0 25
Ta [°C]
50
75 85
S-1009N12
50
40
30
20
10
0
40 25
CD = 4.7 nF
0 25
Ta [°C]
50
75 85
S-1009N11
50
40
30
20
10
0
40 25
S-1009N46
50
40
30
20
10
0
40 25
CD = 4.7 nF
0 25 50
Ta [°C]
75 85
CD = 4.7 nF
0 25 50
Ta [°C]
75 85
VIH*1
1 μs
Input voltage
VIL*2
tD
Output voltage
VDD × 90%
VSS
*1. VIH = 10 V
*2. VIL = 0.7 V
Figure 26 Test Condition for Delay Time
VDD + VDD OUT
V VSS CD
CD
R*1
100 kΩ
+
V
*1. R is unnecessary for CMOS output product.
Figure 27 Test Circuit for Delay Time
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
Seiko Instruments Inc.
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
„ Application Circuit Examples
1. Microcomputer reset circuits
In microcomputers, when the power supply voltage is lower than the guaranteed operation voltage, an unspecified
operation may be performed or the contents of the memory register may be lost. When power supply voltage
returns to the normal level, the microcomputer needs to be initialized. Otherwise, the microcomputer may
malfunction after that. Reset circuits to protect microcomputer in the event of current being momentarily switched
off or lowered.
Using the S-1009 Series which has the low operation voltage, a high accuracy detection voltage and hysteresis,
reset circuits can be easily constructed as seen in Figure 28 and Figure 29.
VDD
VDD1
VDD2
S-1009C
Microcomputer
S-1009N
Microcomputer
VSS
VSS
Figure 28 Example of Reset Circuit
(CMOS Output Product)
Figure 29 Example of Reset Circuit
(Nch Open-drain Output Product)
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
26 Seiko Instruments Inc.


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
2. Power-on reset circuit (Nch open-drain output product only)
A power-on reset circuit can be constructed using the S-1009N Series.
VDD
RA*1
(RA 100 kΩ)
Di*2
VIN
C
R
100 kΩ
S-1009N
OUT
(Nch open-drain output product)
VSS
*1. RA should be 100 kΩ or less to prevent oscillation.
*2. Diode (Di) instantaneously discharges the charge stored in the capacitor (C) at the power falling. Di can be
removed when the delay of the falling time is not important.
Figure 30
VDD OUT
[V] [V]
t [s]
Figure 31
t [s]
Remark
When the power rises sharply, the output may instantaneously be set to the "H" level due to the IC’s
indefinite area (the output voltage is indefinite when it is the IC’s minimum operation voltage or less),
as seen in Figure 32.
VDD OUT
[V] [V]
t [s]
Figure 32
t [s]
Caution 1. The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
2. Note that the hysteresis width may be larger as the following equation shows when using the
above connection. Perform thorough evaluation using the actual application to set the
constant.
Maximum hysteresis width = VHYS + RA 20 μA
Seiko Instruments Inc.
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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
3. Change of detection voltage (Nch open-drain output product only)
If there is not a product with a specified detection voltage value in the S-1009N Series, the detection voltage can be
changed by using a resistance divider or a diode, as seen in Figure 33 and Figure 34.
In Figure 33, hysteresis width also changes.
VDD
RA*1
(RA 100 kΩ)
VIN
S-1009N
R
100 kΩ
OUT
VDD
Vf1
VIN
S-1009N
R
100 kΩ
OUT
RB
VSS
(Nch open-drain
ouput product)
VSS
(Nch open-drain
output product)
Detection voltage =
RA + RB
RB
• −VDET
Hysteresis width =
RA + RB
RB
VHYS
*1. RA should be 100 kΩ or less to prevent oscillation.
Caution
If RA and RB are large, the hysteresis width
may also be larger than the value given by
the above equation due to the feed-through
current.
Figure 33
Detection voltage = Vf1 + (VDET)
Figure 34
Caution 1. The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
2. Note that the hysteresis width may be larger as the following equation shows when using the
above connections. Perform thorough evaluation using the actual application to set the
constant.
Maximum hysteresis width =
RA + RB
RB
VHYS + RA 20 μA
28 Seiko Instruments Inc.


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.5.1_00
S-1009 Series
„ Marking Specifications
1. SOT-23-5
Top view
54
(1) to (3):
(4):
Product code (refer to Product name vs. Product code)
Lot number
(1) (2) (3) (4)
123
Product name vs. Product code
1. 1 Nch open-drain output product
Product Name
Product Code
(1) (2) (3)
S-1009N08I-M5T1U
S-1009N09I-M5T1U
S-1009N10I-M5T1U
S-1009N11I-M5T1U
S-1009N12I-M5T1U
T8A
T8B
T8C
T8D
T8E
S-1009N13I-M5T1U
S-1009N14I-M5T1U
S-1009N15I-M5T1U
T8F
T 8G
T8H
S-1009N16I-M5T1U
S-1009N17I-M5T1U
S-1009N18I-M5T1U
T8
I
T8J
T8K
S-1009N19I-M5T1U
S-1009N20I-M5T1U
S-1009N21I-M5T1U
T8L
T 8M
T8N
S-1009N22I-M5T1U
S-1009N23I-M5T1U
S-1009N24I-M5T1U
T 8O
T8P
T 8Q
S-1009N25I-M5T1U
S-1009N26I-M5T1U
S-1009N27I-M5T1U
T8R
T8S
T8T
S-1009N28I-M5T1U
S-1009N29I-M5T1U
S-1009N30I-M5T1U
T8U
T8V
T 8W
S-1009N31I-M5T1U
S-1009N32I-M5T1U
S-1009N33I-M5T1U
T8X
T8Y
T8Z
S-1009N34I-M5T1U
S-1009N35I-M5T1U
S-1009N36I-M5T1U
S-1009N37I-M5T1U
S-1009N38I-M5T1U
S-1009N39I-M5T1U
S-1009N40I-M5T1U
S-1009N41I-M5T1U
S-1009N42I-M5T1U
S-1009N43I-M5T1U
S-1009N44I-M5T1U
S-1009N45I-M5T1U
S-1009N46I-M5T1U
T9A
T9B
T9C
T9D
T9E
T9F
T 9G
T9H
T9
I
T9J
T9K
T9L
T 9M
1. 2 CMOS output product
Product Name
S-1009C08I-M5T1U
S-1009C09I-M5T1U
S-1009C10I-M5T1U
S-1009C11I-M5T1U
S-1009C12I-M5T1U
S-1009C13I-M5T1U
S-1009C14I-M5T1U
S-1009C15I-M5T1U
S-1009C16I-M5T1U
S-1009C17I-M5T1U
S-1009C18I-M5T1U
S-1009C19I-M5T1U
S-1009C20I-M5T1U
S-1009C21I-M5T1U
S-1009C22I-M5T1U
S-1009C23I-M5T1U
S-1009C24I-M5T1U
S-1009C25I-M5T1U
S-1009C26I-M5T1U
S-1009C27I-M5T1U
S-1009C28I-M5T1U
S-1009C29I-M5T1U
S-1009C30I-M5T1U
S-1009C31I-M5T1U
S-1009C32I-M5T1U
S-1009C33I-M5T1U
S-1009C34I-M5T1U
S-1009C35I-M5T1U
S-1009C36I-M5T1U
S-1009C37I-M5T1U
S-1009C38I-M5T1U
S-1009C39I-M5T1U
S-1009C40I-M5T1U
S-1009C41I-M5T1U
S-1009C42I-M5T1U
S-1009C43I-M5T1U
S-1009C44I-M5T1U
S-1009C45I-M5T1U
S-1009C46I-M5T1U
Product Code
(1) (2) (3)
T6A
T6B
T6C
T6D
T6E
T6F
T 6G
T6H
T6
I
T6J
T6K
T6L
T 6M
T6N
T 6O
T6P
T 6Q
T6R
T6S
T6T
T6U
T6V
T 6W
T6X
T6Y
T6Z
T7A
T7B
T7C
T7D
T7E
T7F
T 7G
T7H
T7
I
T7J
T7K
T7L
T 7M
Seiko Instruments Inc.
29


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SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
2. SC-82AB
Top view
43
(1) to (3): Product code (refer to Product name vs. Product code)
(1) (2) (3)
12
Product name vs. Product code
2. 1 Nch open-drain output product
Product Name
Product Code
(1) (2) (3)
S-1009N08I-N4T1U
S-1009N09I-N4T1U
S-1009N10I-N4T1U
S-1009N11I-N4T1U
S-1009N12I-N4T1U
S-1009N13I-N4T1U
S-1009N14I-N4T1U
S-1009N15I-N4T1U
S-1009N16I-N4T1U
S-1009N17I-N4T1U
S-1009N18I-N4T1U
S-1009N19I-N4T1U
S-1009N20I-N4T1U
S-1009N21I-N4T1U
S-1009N22I-N4T1U
S-1009N23I-N4T1U
S-1009N24I-N4T1U
S-1009N25I-N4T1U
S-1009N26I-N4T1U
S-1009N27I-N4T1U
S-1009N28I-N4T1U
S-1009N29I-N4T1U
S-1009N30I-N4T1U
S-1009N31I-N4T1U
S-1009N32I-N4T1U
S-1009N33I-N4T1U
S-1009N34I-N4T1U
S-1009N35I-N4T1U
S-1009N36I-N4T1U
S-1009N37I-N4T1U
S-1009N38I-N4T1U
S-1009N39I-N4T1U
S-1009N40I-N4T1U
S-1009N41I-N4T1U
S-1009N42I-N4T1U
S-1009N43I-N4T1U
S-1009N44I-N4T1U
S-1009N45I-N4T1U
S-1009N46I-N4T1U
T8A
T8B
T8C
T8D
T8E
T8F
T 8G
T8H
T8 I
T8J
T8K
T8L
T 8M
T8N
T 8O
T8P
T 8Q
T8R
T8S
T8T
T8U
T8V
T 8W
T8X
T8Y
T8Z
T9A
T9B
T9C
T9D
T9E
T9F
T 9G
T9H
T9 I
T9J
T9K
T9L
T 9M
2. 2 CMOS output product
Product Name
S-1009C08I-N4T1U
S-1009C09I-N4T1U
S-1009C10I-N4T1U
S-1009C11I-N4T1U
S-1009C12I-N4T1U
S-1009C13I-N4T1U
S-1009C14I-N4T1U
S-1009C15I-N4T1U
S-1009C16I-N4T1U
S-1009C17I-N4T1U
S-1009C18I-N4T1U
S-1009C19I-N4T1U
S-1009C20I-N4T1U
S-1009C21I-N4T1U
S-1009C22I-N4T1U
S-1009C23I-N4T1U
S-1009C24I-N4T1U
S-1009C25I-N4T1U
S-1009C26I-N4T1U
S-1009C27I-N4T1U
S-1009C28I-N4T1U
S-1009C29I-N4T1U
S-1009C30I-N4T1U
S-1009C31I-N4T1U
S-1009C32I-N4T1U
S-1009C33I-N4T1U
S-1009C34I-N4T1U
S-1009C35I-N4T1U
S-1009C36I-N4T1U
S-1009C37I-N4T1U
S-1009C38I-N4T1U
S-1009C39I-N4T1U
S-1009C40I-N4T1U
S-1009C41I-N4T1U
S-1009C42I-N4T1U
S-1009C43I-N4T1U
S-1009C44I-N4T1U
S-1009C45I-N4T1U
S-1009C46I-N4T1U
Product Code
(1) (2) (3)
T6A
T6B
T6C
T6D
T6E
T6F
T 6G
T6H
T6 I
T6J
T6K
T6L
T 6M
T6N
T 6O
T6P
T 6Q
T6R
T6S
T6T
T6U
T6V
T 6W
T6X
T6Y
T6Z
T7A
T7B
T7C
T7D
T7E
T7F
T 7G
T7H
T7 I
T7J
T7K
T7L
T 7M
30 Seiko Instruments Inc.




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