NXP Semiconductors Electronic Components Datasheet



74HC14-Q100

Hex inverting Schmitt trigger


74HC14-Q100 Datasheet PDF
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74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
Rev. 4 — 19 April 2013
Product data sheet
1. General description
The 74HC14-Q100; 74HCT14-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard No. 7A.
The 74HC14-Q100; 74HCT14-Q100 provides six inverting buffers with Schmitt-trigger
action. They are capable of transforming slowly changing input signals into sharply
defined, jitter-free output signals.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Low-power dissipation
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
3. Applications
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
4. Ordering information
Table 1. Ordering information
Type number
Package
Temperature
range
74HC14N-Q100 40 C to +125 C
74HC14D-Q100 40 C to +125 C
74HCT14D-Q100
74HC14PW-Q100 40 C to +125 C
74HCT14PW-Q100
74HC14BQ-Q100 40 C to +125 C
74HCT14BQ-Q100
Name
Description
Version
DIP14
SO14
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width
3.9 mm
SOT27-1
SOT108-1
TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
5. Functional diagram
1A
1
2A
3
3A
5
4A
9
5A
11
6A
13
1Y
2
2Y
4
3Y
6
4Y 8
5Y 10
6Y 12
mna204
Fig 1. Logic symbol
12
34
56
98
11 10
13 12
001aac497
Fig 2. IEC logic symbol
AY
mna025
Fig 3. Logic diagram
(one Schmitt-trigger)
74HC_HCT14_Q100
Product data sheet
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Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
6. Pinning information
6.1 Pinning
$ 
< 
$ 
< 
$ 
< 
*1' 
+&4
+&74
 9&&
 $
 <
 $
 <
 $
 <
DDD
Fig 4. Pin configuration DIP14, SO14 and TSSOP14
WHUPLQDO 
LQGH[ DUHD
+&4
+&74
< 
$ 
< 
$ 
< 
*1' 
 $
 <
 $
 <
 $
DDD
7UDQVSDUHQW WRS YLHZ
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration DHVQFN14
6.2 Pin description
Table 2.
Symbol
1A to 6A
1Y to 6Y
GND
VCC
Pin description
Pin
1, 3, 5, 9, 11, 13
2, 4, 6, 8, 10, 12
7
14
Description
data input 1
data output 1
ground (0 V)
supply voltage
7. Functional description
Table 3.
Input
nA
L
H
Function table[1]
[1] H = HIGH voltage level;
L = LOW voltage level.
Output
nY
H
L
74HC_HCT14_Q100
Product data sheet
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Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
3 of 20


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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
DIP14 package
VI < 0.5 V or VI >V CC +0 .5 V
VO < 0.5 V or VO >V CC +0 .5 V
0.5 V < VO < VCC +0 .5 V
0.5
[1] -
[1] -
-
-
50
65
[2]
-
+7
20
20
25
50
-
+150
V
mA
mA
mA
mA
mA
C
750 mW
SO14, TSSOP14 and
DHVQFN14 packages
- 500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C.
For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
9. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
VCC
VI
VO
Tamb
supply voltage
input voltage
output voltage
ambient temperature
74HC14-Q100
Min Typ
2.0 5.0
0-
0-
40 +25
Max
6.0
VCC
VCC
+125
74HCT14-Q100
Min Typ Max
4.5 5.0 5.5
0-
VCC
0-
VCC
40 +25 +125
Unit
V
V
V
C
74HC_HCT14_Q100
Product data sheet
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Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
10. S tatic characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
Tamb = 25 C
Tamb = 40 C
to +85 C
Min Typ Max Min Max
74HC14-Q100
VOH HIGH-level VI = VT+ or VT
output voltage IO = 20 A; VCC = 2.0 V
1.9 2.0
-
1.9
-
IO = 20 A; VCC = 4.5 V 4.4 4.5 -
4.4
-
IO = 20 A; VCC = 6.0 V 5.9 6.0 -
5.9
-
IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 -
3.84
-
IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 -
5.34
-
VOL LOW-level VI = VT+ or VT
output voltage IO = 20 A; VCC = 2.0 V
- 0 0.1 -
0.1
IO = 20 A; VCC = 4.5 V
- 0 0.1 -
0.1
IO = 20 A; VCC = 6.0 V
- 0 0.1 -
0.1
IO = 4.0 mA; VCC = 4.5 V
- 0.15 0.26 -
0.33
IO = 5.2 mA; VCC = 6.0 V
- 0.16 0.26 -
0.33
II
input leakage VI = VCC or GND; VCC =6 .0 V -
- ±0.1 -
±1.0
current
ICC supply current VI = VCC or GND; IO =0A ; --
VCC =6 .0 V
2.0 -
CI input
capacitance
-3 .5 -
-
20
-
74HCT14-Q100
VOH HIGH-level VI = VT+ or VT; VCC = 4.5 V
output voltage IO = 20 A
4.4 4.5 -
4.4
-
IO = 4.0 mA
3.98 4.32 - 3.84
-
VOL LOW-level VI = VT+ or VT; VCC = 4.5 V
output voltage IO = 20 A;
- 0 0.1 -
0.1
IO = 4.0 mA;
- 0.15 0.26 -
0.33
II
input leakage VI = VCC or GND; VCC =5 .5 V -
- ±0.1 -
±1.0
current
ICC
ICC
CI
supply current
additional
supply current
input
capacitance
VI =V CC or GND; IO = 0 A;
VCC =5 .5 V
per input pin;
VI =V CC 2.1 V; other pins
at VCC or GND; IO =0A ;
VCC = 4.5 V to 5.5 V
-- 2.0
- 30 108
-
-
-3 .5 -
-
20
135
-
Tamb = 40 C
to +125 C
Min Max
Unit
1.9 - V
4.4 - V
5.9 - V
3.7 - V
5.2 - V
- 0.1 V
- 0.1 V
- 0.1 V
- 0.4 V
- 0.4 V
- ±1.0 A
- 40 A
- - pF
4.4 - V
3.7 - V
- 0.1 V
- 0.4 V
- ±1.0 A
- 40 A
- 147 A
- - pF
74HC_HCT14_Q100
Product data sheet
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Rev. 4 — 19 April 2013
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
11. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; CL = 50 pF; for load circuit see Figure 7.
Symbol Parameter
Conditions
Tamb = 25 C
Min Typ Max
74HC14-Q100
tpd propagation delay nA to nY; see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
tt
transition time
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
CPD power dissipation per package; VI = GND to VCC
capacitance
74HCT14-Q100
tpd propagation delay nA to nY; see Figure 6
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
tt
transition time
VCC = 4.5 V; see Figure 6
CPD power dissipation per package;
capacitance
VI = GND to VCC 1.5 V
[1]
[2]
[3]
[1]
[2]
[3]
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD =C PD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
-
-
-
-
-
-
-
-
-
-
-
-
41 125
15 25
12 -
12 21
19 75
7 15
6 13
7-
20 34
17 -
7 15
8-
Tamb = 40 C to Unit
+125 C
Max Max
(85 C) (125 C)
155 190 ns
31 38 ns
- - ns
26 32 ns
95 110 ns
19 22 ns
15 19 ns
- - pF
43 51 ns
- - ns
19 22 ns
- - pF
74HC_HCT14_Q100
Product data sheet
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Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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12. Waveforms
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
VI
nA input
GND
VOH
nY output
VOL
VM
t PHL
VM
t THL
VM
VM
10 %
t PLH
90 %
t TLH
mna722
Fig 6.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Input to output propagation delays
Table 8. Measurement points
Type
Input
VM
74HC14-Q100
0.5VCC
74HCT14-Q100
1.3 V
Output
VM
0.5VCC
1.3 V
VX
0.1VCC
0.1VCC
VY
0.9VCC
0.9VCC
VI 90 %
negative
pulse
GND
VI
positive
pulse
10 %
GND
VM
10 %
tf
tr
90 %
VM
VI
G
RT
tW
tW
VCC
DUT
VM
tr
tf
VM
VO
CL
001aah768
Fig 7.
Test data is given in Table 9.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
Test circuit for measuring switching times
74HC_HCT14_Q100
Product data sheet
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Rev. 4 — 19 April 2013
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
Table 9. Test data
Type
74HC14-Q100
74HCT14-Q100
Input
VI
VCC
3.0 V
tr, tf
6.0 ns
6.0 ns
13. Transfer characteristics
Load
CL
15 pF, 50 pF
15 pF, 50 pF
Test
tPLH, tPHL
tPLH, tPHL
Table 10. Transfer characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Figure 8 and Figure 9.
Symbol Parameter Conditions
Tamb = 25 C
Tamb = 40 C
to +85 C
Tamb = 40 C
to +125 C
Min Typ Max Min Max Min Max
74HC14-Q100
VT+ positive-going VCC = 2.0 V
threshold
voltage
VCC = 4.5 V
VCC = 6.0 V
VTnegative-going VCC = 2.0 V
threshold
voltage
VCC = 4.5 V
VCC = 6.0 V
VH
hysteresis
VCC = 2.0 V
voltage
VCC = 4.5 V
VCC = 6.0 V
74HCT14-Q100
0.7 1.18 1.5 0.7
1.5
0.7
1.5
1.7 2.38 3.15 1.7 3.15 1.7 3.15
2.1 3.14 4.2 2.1
4.2
2.1
4.2
0.3 0.52 0.9 0.3
0.9
0.3
0.9
0.9 1.4 2.0 0.9
2.0
0.9
2.0
1.2 1.89 2.6 1.2
2.6
1.2
2.6
0.2 0.66 1.0 0.2
1.0
0.2
1.0
0.4 0.98 1.4 0.4
1.4
0.4
1.4
0.6 1.25 1.6 0.6
1.6
0.6
1.6
VT+ positive-going VCC = 4.5 V
threshold
voltage
VCC = 5.5 V
1.2 1.41 1.9 1.2
1.9
1.2
1.9
1.4 1.59 2.1 1.4
2.1
1.4
2.1
VTnegative-going VCC = 4.5 V
threshold
voltage
VCC = 5.5 V
0.5 0.85 1.2 0.5
1.2
0.5
1.2
0.6 0.99 1.4 0.6
1.4
0.6
1.4
VH
hysteresis
VCC = 4.5 V
voltage
VCC = 5.5 V
0.4 0.56 -
0.4
-
0.4
-
0.4 0.6 -
0.4
-
0.4
-
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
14. Transfer characteristics waveforms
VO
VT+
VI VH
VT
VH
VTVT+
Fig 8. Transfer characteristics
74HC_HCT14_Q100
Product data sheet
VI
mna207
VO
mna208
Fig 9. Transfer characteristics definitions
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Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
50
ICC
(μA)
40
mna846
1.0
ICC
(mA)
0.8
mna847
30 0.6
20 0.4
10
0
0 0.4 0.8 1.2 1.6 2.0
VI (V)
a. VCC = 2.0 V
1.0
ICC
(mA)
0.8
0.2
0
01 234 5
VI (V)
b. VCC = 4.5 V
mna848
0.6
0.4
0.2
0
0 1.2
c. VCC =6 .0 V
Fig 10. Typical 74HC transfer characteristics
2.4 3.6
4.8 6.0
VI (V)
74HC_HCT14_Q100
Product data sheet
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
1.5
ICC
(mA)
1.2
0.9
0.6
0.3
mna849
1.8
ICC
(mA)
1.5
1.2
0.9
0.6
0.3
mna850
0
01 234 5
VI (V)
a. VCC = 4.5 V
Fig 11. Typical 74HCT transfer characteristics
0
0 123456
VI (V)
b. VCC = 5.5 V
15. Application information
The slow input rise and fall times cause additional power dissipation, this can be
calculated using the following formula:
Padd = fi (tr  ICC(AV) + tf  ICC(AV)) VCC where:
Padd = additional power dissipation (W);
fi = input frequency (MHz);
tr =r ise time (ns); 10 %t o9 0% ;
tf = fall time (ns); 90 % to 10 %;
ICC(AV) = average additional supply current (A).
Average ICC(AV) differs with positive or negative input transitions, as shown in Figure 12
and Figure 13.
An example of a relaxation circuit using the 74HC14-Q100; 74HCT14-Q100 is shown
in Figure 14.
74HC_HCT14_Q100
Product data sheet
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Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
400
ICC(AV)
(μA)
300
mna852
200 positive - going
edge
100
negative - going
edge
0
0 2 4 VCC (V) 6
(1) Positive-going edge.
(2) Negative-going edge.
Fig 12. Average additional supply current as a function of VCC for 74HC14-Q100; linear change of VI between
0.1VCC to 0.9VCC.
400
ICC(AV)
(μA)
300
200
100
mna853
positive - going
edge
negative - going
edge
0
0 2 4 VCC (V) 6
(1) Positive-going edge.
(2) Negative-going edge.
Fig 13. Average additional supply current as a function of VCC for 74HCT14-Q100; linear change of VI between
0.1VCC to 0.9VCC.
74HC_HCT14_Q100
Product data sheet
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Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
R
C
mna035
For 74HC14-Q100 and 74HCT14-Q100:
f
=
-1-
T
K---R-1----C------
For K-factor see Figure 15
Fig 14. Relaxation oscillator

.

DDD




9&& 9
K-factor for 74HC14-Q100
Fig 15. Typical K-factor for relaxation oscillator

.








K-factor for 74HCT14-Q100
DDD

9&& 9
74HC_HCT14_Q100
Product data sheet
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
16. Package outline
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
D
L
Z
14
e
pin 1 index
b
A2 A
A1
wM
b1
8
ME
c
(e 1)
MH
E
17
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
D (1)
Ee(1)
mm
4.2
0.51
3.2
1.73
1.13
0.53
0.38
0.36 19.50 6.48
0.23 18.55 6.20
inches 0.17
0.02
0.13
0.068 0.021 0.014
0.044 0.015 0.009
0.77
0.73
0.26
0.24
2.54
0.1
e1
7.62
0.3
L
3.60
3.05
0.14
0.12
ME
8.25
7.80
0.32
0.31
MH
w
Z (1)
max.
10.0
8.3
0.254
2.2
0.39
0.33
0.01 0.087
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
OUTLINE
VERSION
SOT27-1
IEC
050G04
REFERENCES
JEDEC
JEITA
MO-001
SC-501-14
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-13
Fig 16. Package outline SOT27-1 (DIP14)
74HC_HCT14_Q100
Product data sheet
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Rev. 4 — 19 April 2013
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
y
Z
14
D
pin 1 index
1
e
EA
X
c
HE
vM A
8
A2
A1
7
bp
wM
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
UNIT max. A1 A2 A3 bp
c D(1) E(1) e
HE
L
Lp
QZ v
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
inches
0.069
0.010
0.004
0.057
0.049
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.05
0.244
0.228
0.041
0.039
0.016
0.028
0.024
0.01
wy
(1)
0.25 0.1
0.7
0.3
0.01
0.004
0.028
0.012
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
OUTLINE
VERSION
SOT108-1
IEC
076E06
REFERENCES
JEDEC
JEITA
MS-012
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 17. Package outline SOT108-1 (SO14)
74HC_HCT14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
y
Z
14
8
c
EA
X
HE v M A
pin 1 index
1
e
7
bp
wM
A2
A1
Q
(A 3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
D (1) E (2)
e
5.1
4.9
4.5
4.3
0.65
HE
6.6
6.2
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT402-1
MO-153
L Lp Q v w y Z (1) θ
1
0.75 0.4
0.50 0.3
0.2
0.13
0.1
0.72
0.38
8o
0o
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
Fig 18. Package outline SOT402-1 (TSSOP14)
74HC_HCT14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
SOT762-1
D BA
terminal 1
index area
A
A1
E
c
detail X
terminal 1
index area
L
e
2
1
Eh
14
e1
b
6
vM C AB
wM C
7
e
8
y1 C
C
y
13
Dh
9
0 2.5
5 mm
X
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A(1)
max.
A1
b
c D(1) Dh E(1) Eh e e1 L
v
w
y
y1
mm
1
0.05 0.30
0.00 0.18
0.2
3.1 1.65
2.9 1.35
2.6
2.4
1.15
0.85
0.5
2
0.5
0.3
0.1 0.05 0.05 0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
EUROPEAN
PROJECTION
SOT762-1
---
MO-241
---
ISSUE DATE
02-10-17
03-01-27
Fig 19. Package outline SOT762-1 (DHVQFN14)
74HC_HCT14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
17. Abbreviations
Table 11. Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
Low-power Schottky Transistor-Transistor Logic
MM Machine Model
MIL Military
18. Revision history
Table 12. Revision history
Document ID
Release date Data sheet status
Change notice
74HC_HCT14_Q100 v.4 20130419
Product data sheet
Modifications:
74HCT14N-Q100 removed.
-
74HC_HCT14_Q100 v.3 20130410
Product data sheet
-
Modifications:
74HC14N-Q100 and 74HCT14N-Q100 added.
74HC_HCT14_Q100 v.2 20120810
Product data sheet
-
Modifications:
Figure 15 added (typical K-factor for relaxation oscillator).
74HC_HCT14_Q100 v.1 20120709
Product data sheet
-
Supersedes
74HC_HCT14_Q100 v.3
74HC_HCT14_Q100 v.2
74HC_HCT14_Q100 v.1
-
74HC_HCT14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
19. Legal information
19.1 Dat a sheet status
Document status[1][2]
Objective [short] data sheet
Preliminary [short] data sheet
Product [short] data sheet
Product status[3]
Development
Qualification
Production
Definition
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
19.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
74HC_HCT14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
19.4 T rademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
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NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
21. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Functional description . . . . . . . . . . . . . . . . . . . 3
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
9 Recommended operating conditions. . . . . . . . 4
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
13 Transfer characteristics . . . . . . . . . . . . . . . . . . 8
14 Transfer characteristics waveforms. . . . . . . . . 8
15 Application information. . . . . . . . . . . . . . . . . . 10
16 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
17 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17
18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17
19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
19.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
19.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
19.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
19.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
20 Contact information. . . . . . . . . . . . . . . . . . . . . 19
21 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 April 2013
Document identifier: 74HC_HCT14_Q100




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