Fairchild Semiconductor Electronic Components Datasheet



J109

N-Channel Switch


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January 2015
J109 / MMBFJ108
N-Channel Switch
Features
• This device is designed for digital switching applications
where very low on resistance is mandatory.
• Sourced from process 58
1 TO-92
1. Drain 2. Source 3. Gate
Figure 1. J109 Device Package
Ordering Information
Part Number
J109
J109_D26Z
MMBFJ108
Top Mark
J109
J109
I8
3
2
1 SuperSOT-3
Marking: I8
1. Drain 2. Source 3. Gate
Figure 2. MMBFJ108 Device Package
Package
TO-92 3L
TO-92 3L
SSOT 3L
Packing Method
Bulk
Tape and Reel
Tape and Reel
Absolute Maximum Ratings(1), (2)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
Value
Unit
VDG
VGS
IGF
TJ, TSTG
Drain-Gate Voltage
Gate-Source Voltage
Forward Gate Current
Operating and Storage Junction Temperature Range
25
-25
10
-55 to 150
V
V
mA
°C
Notes:
1. These ratings are based on a maximum junction temperature of 150°C.
2. These are steady-state limits. Fairchild Semiconductor should be consulted on applications involving pulsed or
low-duty-cycle operations.
© 2002 Fairchild Semiconductor Corporation
J109 / MMBFJ108 Rev. 2.2
www.fairchildsemi.com


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Thermal Characteristics
Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
Max.
J109(3) MMBFJ108(4)
Unit
Total Device Dissipation
PD Derate Above 25°C
625 350 mW
5.0 2.8 mW/°C
RθJC
RθJA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
125 °C/W
200 357 °C/W
Notes:
3. PCB size: FR-4, 76 mm x 114 mm x 1.57 mm (3.0 inch x 4.5 inch x 0.062 inch) with minimum land pattern size.
4. Device mounted on FR-4 PCB 36mm × 18mm × 1.5mm; mounting pad for the collector lead minimum 6cm2.
Electrical Characteristics
Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
Conditions
Off Characteristics
V(BR)GSS Gate-Source Breakdown Voltage
IGSS Gate Reverse Current
VGS(off) Gate-Source Cut-Off Voltage
IG = -10 μA, VDS = 0
VGS = -15 V, VDS = 0
VGS = -15 V, VDS = 0, TA = 100°C
MMBFJ108
VDS = 15 V, ID = 10 nA J109
On Characteristics
IDSS
Zero-Gate Voltage Drain Current(5) VDS = 15 V, VGS = 0
MMBFJ108
J109
rDS(on) Drain-Source On Resistance
MMBFJ108
VDS 0.1 V, VGS = 0 J109
Small Signal Characteristics
Cdg(on)
Csg(off)
Cdg(off)
Csg(off)
Drain-Gate &Source-Gate On
Capacitance
Drain-Gate Off Capacitance
Source-Gate Off Capacitance
VDS = 0, VGS = 0, f = 1.0 MHz
VDS = 0, VGS = -10 V, f = 1.0 MHz
VDS = 0, VGS = -10 V, f = 1.0 MHz
Note:
5. Pulse test: pulse width 300 μs, duty cycle 2%.
Min.
-25
-3.0
-2.0
80
40
Max. Unit
-3.0
-200
-10.0
-6.0
V
nA
V
mA
8.0
Ω
12
85 pF
15 pF
15 pF
© 2002 Fairchild Semiconductor Corporation
J109 / MMBFJ108 Rev. 2.2
2
www.fairchildsemi.com


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Typical Performance Characteristics
Common Drain-Source
100
V GS = 0 V
- 2.0 V
80
- 1.0 V
- 3.0 V
60
40
20
0
0
- 4.0 V
- 5.0 V
TA = 25°C
TYP V GS(off) = - 5.0 V
0.4 0.8 1.2 1.6
VDS - DRAIN-SOURCE VOLTAGE (V)
2
Figure 3. Common Drain-Source
100
f = 0.1 - 1.0 MHz
C iss (V DS = 5.0V)
10
C rss (VDS = 0 )
0 -4 -8 -12 -16 -20
V GS - GATE-SOURCE VOLTAGE (V)
Figure 5. Common Drain-Source
100
50
VGS(off) @ 5.0V, 10 μA
r DS
20
r DS =
1
-___V_G_S___
10 V GS(off)
5
2
1
0 0.2 0.4 0.6 0.8 1
VGS /VGS(off)- NORMALIZED GATE-SOURCE VOLTAGE (V)
Figure 7. Normalized Drain Resistance vs.
Bias Voltage
Parameter Interactions
100 I DSS @ VDS = 5.0V, VGS = 0 PULSED
50 r DS @ VDS = 100mV, VGS = 0
V GS(off) @ V DS = 5.0V, I D = 3.0 nA
r DS
10
5
I DSS
1,000
500
100
50
_ 0.1
_ 0.5 _ 1
_5
_
10
10
VGS (OFF) - GATE CUTOFF VOLTAGE (V)
Figure 4. Parameter Interactions
50
TA = 25°C
40 TYP V GS(off) = - 0.7 V
30
V GS = 0 V
20 - 0.1 V
- 0.2 V
- 0.3 V - 0.4 V - 0.5 V
10
0
012345
VDS - DRAIN-SOURCE VOLTAGE (V)
Figure 6. Common Drain-Source
100
50
VDG = 10V
BW = 6.0 Hz @ f = 10 Hz, 100 Hz
= 0.21 @ f 1.0 kHz
10
5
I D = 10 mA
I D = 1.0 mA
1
0.01 0.03 0.1
0.5 1 2
10
f - FREQUENCY (kHz)
100
Figure 8. Noise Voltage vs. Frequency
© 2002 Fairchild Semiconductor Corporation
J109 / MMBFJ108 Rev. 2.2
3
www.fairchildsemi.com


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Typical Performance Characteristics (Continued)
Switching Turn-On Time vs
Gate-Source Cutoff Voltage
10
TA = 25°C
8 VDD = 1.5V
V GS(off)= - 12V
6
I D = 30 mA
4
I D = 10 mA
2
0
0 -2 -4 -6 -8 -10
VGGSS((ooffff)) - GATE-SOURCE CUTOFF VOLTAGE (V)
Figure 9. Switching Turn-On Time vs.
Gate-Source Cut-Off Voltage
Switching Turn-On Time
vs Drain Current
50
40 V GS(off) = - 8.5V
30
20
TA = 25°C
VGS(off) = - 5.5V
V GS(off) = - 3.5V
10 VDD = 1.5V
V GS(off)= - 12V
0
0 5 10 15 20
I D - DRAIN CURRENT (mA)
25
Figure 10. Switching Turn-On Time vs. Drain Current
100
50
10
5
V GS(off)= - 3.0V
125°C
25°C
VGS = 0
125°C
25°C
- 55°C
V GS(off)= - 5.0V
1
1 10 100
I D - DRAIN CURRENT (mA)
Figure 11. On Resistance vs. Drain Current
100
V DG = 5.0V
10V
VGS(off) 5.0V
15V
20V
- 4.0V
10V 5.0V
10 15V
10V
20V 15V
- 2.0V
20V
T A = 25°C
1
0.1
- 1.0V
f = 1.0 kHz
1 10
I D - DRAIN CURRENT (mA)
Figure 12. Output Conductance vs. Drain Current
100
TA = 25°C
V DG = 10V
f = 1.0 kHz
TA = - 55°C
T A = 25°C
TA = 125°C
10
1
0.1
V GS(off) = - 1.0V
VGS(off) = - 3.0V
V GS(off) = - 5.0V
1
I D - DRAIN CURRENT (mA)
10
Figure 13. Transconductance vs. Drain Current
700
600
500
400 SuperSO T-3
T O -92
300
200
100
0
0 25 50 75 100
TEM PER ATUR E (oC )
125
150
Figure 14. Power Dissipation vs.
Ambient Temperature
© 2002 Fairchild Semiconductor Corporation
J109 / MMBFJ108 Rev. 2.2
4
www.fairchildsemi.com


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Physical Dimensions
D
Figure 15. 3-Lead, TO-92, JEDEC TO-92 Compliant Straight Lead Configuration, Bulk Type
© 2002 Fairchild Semiconductor Corporation
J109 / MMBFJ108 Rev. 2.2
5
www.fairchildsemi.com


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Physical Dimensions (Continued)
Figure 16. 3-Lead, TO-92, Molded, 0.2 In Line Spacing Lead Form, Ammo, Tape and Reel Type
© 2002 Fairchild Semiconductor Corporation
J109 / MMBFJ108 Rev. 2.2
6
www.fairchildsemi.com


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Physical Dimensions (Continued)
Figure 17. MOLDED PACKAGE, SUPERSOT, 3-LEAD
© 2002 Fairchild Semiconductor Corporation
J109 / MMBFJ108 Rev. 2.2
7
www.fairchildsemi.com


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Datasheet contains the design specifications for product development. Specifications may change
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Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
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Rev. I73
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