Toshiba Electronic Components Datasheet



TC511632FL-85

SILICON GATE CMOS PSEUDO STATIC RAM


TC511632FL-85 Datasheet PDF
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TOSHIBA
SILICON GATE CMOS
1l:511632~/F1lL-70/85/10
PRELIMINARY
32,768 WORD x 16 BIT CMOS PSEUDO STATIC RAM
Description
The TC511632FUFTL is a 512K bit high speed CMOS pseudo static RAM organized as 32,768 words by 16 bits. The
TC511632FUFTL utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high
speed and low power storage. The TC511632FUFTL operates from a single 5V power supply. Refreshing is supported by a
refresh (RFSH) input which enables two types of refreshing - auto refresh and self refresh. The TC511632FUFTL features a static
RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of WE thus simplifying
the microprocessor interface.
The TC511632FUFTL is available in a 40-pin small outline plastic flat package and a 44-pin outline (40 actual pins) plastic thin
small outline package (forward type).
Features
Pin Connection (Top View)
• Organization: 32,768 words x 16 bits
• Single 5V power supply
• Fast access time
TC511632FL/FTL
-70 -85 -10
tCEA CE Access Time
tOEA OE Access Time
tAC Cycle Time
Power Dissipation
Self Refresh Current
70ns
30ns
115ns
440mW
85ns
35ns
135ns
385mW
100!lA
100ns
40ns
160ns
330mW
• Auto refresh is supported by an internal refresh address
counter
GND
A9
A8
A7
A6
AS
A4
A3
A2
Al
AO
1/01
1/02
1103
1/04
1/05
1/06
1107
1/08
GND
imr GND
A9
"['i;ii;iE
A8
Al0 A7
All A6
A12 AS
An A4
Al.l1Q4! __
A3
A2
l.QEI RFSH Al
CE
1/016
1/015
AO
1/014
1/013
11012
11011
1/01
1102
1103
1104
1/010 1105
1109 1106
Voo 1/07
FL
1/08
GND
twr
lWE
AIO
All
Al2
A13
\A.!1i4ll __
LOE I RFSH
'IT
1/016
11015
11014
11013
11012
11011
11010
1/09
Voo
FTL
• Self refresh is supported by an internal timer
• Inputs and outputs TIL compatible
• Refresh: 256 refresh cycles/4ms
• Package
- TC511632FL: SOP40-P-525
- TC511632FTL: TSOP44-P-400B
Pin Names
AO - A14
UWE
Address Inputs
Upper Byte Write Enable Input
LWE
Lower Byte Write Enable Input
UOE
Upper Byte Output Enable Input
LOE/RFSH
CE
Lower Byte Output Enable Input
Refresh Input
Chip Enable Input
1/01 - 1/016
VDD
GND
Data Inputs/Outputs
Power
Ground
TOSHIBA AMERICAEL.ECTRONIC COMPDNENTS, INC.
0-19


TC511632FL-85 Datasheet PDF
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TC511632FUFTL-70/85/10
Block Diagram
Static RAM
1/016
1109
Operating Mode
~NMODE
Standby
Read (Word)
Read (Upper Byte)
Read (Lower Byte)
Read (HZ)
Write (Word)
Write (Upper Byte)
Write (Lower Byte)
Don't Use
Don't Use
CE
H
L
L
L
L
L
L
L
L
L
UOE
LOEI
RFSH
UWE
LWE AO -A14 1/09 -16 1/01 - 8
** **
L L HH
LHHH
HL HH
HH HH
* HZ HZ
V* DOUT DOUT
V*
DOUT
HZ
V* HZ DOUT
V* HZ HZ
* * L L V* D,N D,N
* H L H V* D,N *
H*
*L
HL
LH
V*
*
* D,N
--
L* HL
*
--
CE only Refresh
Auto/Self Refresh
L r~
H
*
H
H
*
H
*
V*
*
HZ
HZ
H
H = High level input (VI H)
L = Low level input (VIU
* = VIH orVIL
V* = At the falling edge of CE, all address inputs are latched. At all other times, the address inputs are "'''.
HZ = High impedance
HZ
HZ
Maximum Ratings
SYMBOL
ITEM
V,N Input Voltage
VOUT Output Voltage
Voo Power Supply Voltage
TOPR Operating Temperature
TSTRG Storage Temperature
TSOLOER Soldering Temperature • Time
Po Power Dissipation
lOUT Short Circuit Output Current
RATING
-1.0 -7.0
-1.0-7.0
-1.0 - 7.0
0-70
-55 - 150
260 -10
600
50
UNIT NOTES
V
V
V
°C
1
°C
°C - sec
mW
mA
.0-20
TOSI:'IIBA AMERICA ELECTRONIC CO.M,PONENTS. INC.
PRELIMINARY


TC511632FL-85 Datasheet PDF
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Static RAM
TC511632FUFTL-70/8511 0
DC Recommended Operating Conditions
SYMBOL
PARAMETER
Voo Power Supply Voltage
V IH Input High Voltage
VIL Input Low Voltage
MIN. TYP. MAX. UNIT NOTES
4.5 5.0
5.5
V
-2.4 Voo+ 1.0 V
--0.5 0.8 V
2
DC Characteristics (Ta = 0 - 70°C, Voo = 5V±10%)
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT NOTES
Operating Current (Average)
1000 CE, Address cycling: tRC = tRc min.
70ns version
85ns version
100ns version
- 60 80
- 50 70 rnA 3,4
- 40 60
100S1
IOOS2
Standby Current
CE = VIH" All other pins = VIH or VIL
Standby Current
CE = Voo - 0.2V, All other pins = Voo - 0.2V or 0.2V
--
1 rnA
- - 100 ~
100F1
100F2
Self Refresh Current (Average)
CE = VIH, LOE/RFSH = VIL, All other pins = VIH or VIL
Self Refresh Current (Average)
CE = Voo - 0.2V, LOE/RFSH = 0.2V, All other pins = Voo - 0.2V or 0.2V
-
-
- 1 rnA
50 100 ~
II(L)
10(L)
VOH
VOL
Input Leakage Current
OV ::; VIN ::; Voo, All other inputs not under test = OV
Output Leakage Current
Output Disabled (CE = VIH or LOE/RFSH = VIH or LWE = Vld
OV::; VOUT ::; Voo
UOE =VIH UWE=VIL
Output High Level
10H = -1mA
Output Low Level
10L= 2.1mA
- - ±10 ~
- - ±10 ~
2.4 - - V
- - 0.4 V
= = =Capacitance* (Voo 5V, Ta 25°C, f 1MHz)
SYMBOL
PARAMETER
CI1 Input Capacitance (AO - A14)
CI2 Input Capacitance (CE, LOEIRFSH, UOE, LWE, UWE)
CIO Input/Output Capacitance
*This parameter is periodically sampled and is not 100% tested.
MIN. MAX. UNIT
-5
- 7 pF
-7
PRELIMINARY
TDSHIBA AMERICA ELECTRONIC CDMPONENTS, INC.
D-21


TC511632FL-85 Datasheet PDF
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TC511632FUFTL-70/85/10
Static RAM
AC Characteristics (Ta =0 - 70°C, Voo = 5V±10%) (Notes: 5, 6, 7, 8,13)
SYMBOL
PARAMETER
-70
MIN. MAX.
-85
MIN. MAX.
tRC
tRMw
tCE
tp
tCEA
tOEA
tCLl
toll
tWLl
tCHZ
tOHZ
tWHZ
tosc
tLOHC
tUOHC
t LWEO
tUWEO
tRCS
tRCH
twp
tWCH
tCWL
tosw
tosc
tOHW
tOHC
tASC
tAHC
tFc
tRFO
tFAP
t FP
tFAS
t FRS
tREF
tT
Random Read, Write Cycle Time
Read Modify Write Cycle Time
CE Pulse Width
CE Precharge Time
CE Access Time
OE Access Time
CE to Output in Low-Z
OE to Output in Low -Z
Output Active from End of Write
Chip Disable to Output in High-Z
OE Enable to Output in High-Z
Write Enable to Output in High-Z
OE Setup Time Referenced to CE
LOE Hold Time Referenced to CE
UOE Hold Time Referenced to CE
From UOE Disable to LWE Enable
From LOE Disable to UWE Enable
Read Command Setup Time
Read Command Hold Time
Write Pulse Width
Write Command Hold Time
Write Command to CE Lead Time
Data Setup Time from RIW
Data Setup Time from CE
Data Hold Time from RIW
Data Hold Time from CE
Address Setup Time
Address Hold Time
Auto Refresh Cycle Time
RFSH Delay Time from CE
RFSH Pulse Width (Auto Refresh)
RFSH Precharge Time
RFSH Pulse Width (Self Refresh)
CE Delay Time from RFSH (Self Refresh)
Refresh Period (256 cycles, AO - A7)
Transition Time (Rise and Fall)
115
175
70
35
-
-
20
0
0
0
0
0
10
0
0
0
0
0
0
25
40
25
20
20
0
0
0
20
115
35
80
30
8,000
115
-
3
-
-
10,000
-
70
30
-
-
-
25
25
25
-
tCE
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
8,000
-
-
-
4
50
135
190
85
40
-
-
20
0
0
0
0
0
10
0
0
0
0
0
0
25
40
25
20
20
0
0
0
20
135
40
80
30
8,000
135
-
3
-
-
10,000
-
85
35
-
-
-
25
25
25
-
tCE
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
8,000
-
-
-
4
50
-10
MIN.
160
220
100
50
-
-
20
0
0
0
0
0
10
0
0
0
0
0
0
25
40
25
20
20
0
0
0
20
160
50
80
30
8,000
160
-
3
MAX;
-
-
10,000
-
100
40
-
-
-
30
30
30
-
tCE
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
8,000
-
-
-
4
50
UNIT NOTES
-
-
-
-
-
-
-
~
-
-9
-9
9
~
9
~
9
r---
9
I---
9
r---
9
ns .r---
~
~
r---
~
~
10
r---
10
r---
10
~
10
r---
11
r---
11
~
r---
r--
12
I---
12
I---
12
I---
12
ms
ns
0-22
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
PRELIMINARY


TC511632FL-85 Datasheet PDF
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Static RAM
TC511632FUFTL-70/8511 0
Notes:
1) Stress greater than those listed under "Maximum Ratings" may cause permanent damage to the device.
2) All voltages are referenced to GND.
3) 1000 depends on the cycle time.
4) 1000 depends on the output loading. Specified values are obtained with the outputs open.
5) An initial pause of 100llS with high CE is required after power-up before proper device operation is achieved.
6) AC measurements assume tT = 5ns.
7) Timing reference levels
Input Levels
Input Reference Levels
Output Reference Levels
V1H
V1L
= 2.6V
=0.6V
V1H = 2.4V
V1L =0.8V
VOH = 2.2V
VOL = 0.8V
INPUT
2.6V
O.6V
OUTPUT
INPUT REFERENCE
LEVEL
2.2V
OUTPUT REFERENCE
LEVEL
8) Measured with a load equivalent to 1 TIL load and 100pF.
9) tCHZ, tOHZ' tWHZ define the time at which the output achieves the open circuit condition and is not referenced to output
voltage levels.
10) For write cycles, the input data is latched at the earlier of WE or CE rising edge. Therefore, the input data must be valid
during the setup time (tosw or toscl and hold time (tOHW or tOHcl.
11) All address inputs,are latched at the falling edge of CEo Therefore, all the address inputs must be valid during tASC and tAHC '
12) The two refresh operations, auto refresh and self refresh, are defined by the RFSH pulse width under the condition CE ::: V1H.
Auto refresh : RFSH pulse width ~ tFAP (max.)
Self refresh : RFSH pulse width ~ tFAS (min.)
The timing parameter tFRs must be met for proper device operation under the following conditions:
• after self refresh
• if RFSH = ilL" after power-up
13) CE only refresh or auto refresh must begin within 15.61lS after self refreshing ends.
PRELIMINARY
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
0-23


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TC511632FUFTL-70/85/10
Timing Waveforms
Read Cycle
4
f\
Static RAM
tRC
!s:E
.~ 4
tAHC
ADDRESS
7,m
tRCS I
7
tp
.1
~j
r\
~ 'RCW
,I tRCH
,
\I
~1iC
\
/
-teEA
tOEA
tOHZ
tCHZ
~
Hz
DATA-OUT
1\
V
Hz
tOll
ItCll
tCEA
tOHZ
toEA
tCHZ
~Hz DATA-OUT 1\ Hz
tOll
V
tClZ
0-24
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
PRELIMINARY


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Write Cycle 1 (OE Fixed High)
Static RAM
TC511632FUFTL-70/85/10
tCWL
~- ~ I
1L
V
-~--------------~----~~----------------~--------------------------------~~----------------~~----~~-----------------
I~t~sc
IIVIH -
vlL -~----L.---..........Jt------Z:H-----++--~---
tosw
1/01-1 6
V1H
VIL
-
_
----------------------------------------------------------<
DATA-IN
~----------------------~---------~
PRELIMINARY
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.


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TC511632FUFTL-70/85/10
Upper Byte Write Cycle 2 (OE Clocked)
Static RAM
VIM __- - - , . . . . - - - - - ' \ . l ...I -_ _ _ _ _ _ _ _...:looi._ _ _ _ _ _ _ _-.I J~~==:=I~---
a V1l-
V,H
AO- A14 V,L
UQt. VIH -
V ,L -
VIH -
Imilfmi
V 1L -
VIM -
UWE
VIL -
tosc
tRCS
VIM _~----~r_~--------_r--+_------_+~+_----~~b_----------
V IL - - - - - - - '
VIH -----------+------4---4---<1
VIL -
= .I/O 1-8: DIN
H" or .. LIf
Dour = OPEN
!?W/%j :"H" or .. L..
0-26
TOSHIBA AMERICA ELECTRONIC COMPONENTS. INC.
PREU1\111NARY


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Lower Byte Write Cycle 3 (OE Clocked)
Static RAM
TC511632FUFTL-70/85/10
VIH
AO - A14 VIL
ADDRESS
tosc
VIH -~--------~--~~------------------------------~------------~~--~---+----------
UOE VIL - ______-J
~mHVIVLIH
-~--------------~~----------~----------------------~--------------~+-~---------+------------
_ ~--------~~------~------------~~----~--------------
VIH -~--------------~-----+~------------------~--------------------------~--------------~~~---------------------
V IL - _ _ _ _ _J
'[WE VIH -
____________ __________ _____________VIL -~______~______~__________________+-~~
~+-~
~~~~
rN
1101-8
VIH -
V IL -
LOUT VoH-
VoL -
H
tell
=1/09-16: DIN "W or "L"
Dour = OPEN
H
PRELIMINARY
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
0-27


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TC511632FUFTL-70/8511 0
Read Modify Write Cycle
V,H -~---:,.....----~­
a V1L -
Static RAM
V,M _~--------+-i--""\L
ITOE
V,L
_
--------~~-~~----------~+--------------~~-----------
_________________IOt/RF~HVvIIHL
-
_
~+--~~-----------L+-------------------~+_--------
tcwL
VIH -
VIL - _ _ _ _ _.1
VIH _~-------::r--+-+---++--------+--"\.
VIL - _ _ _ _ _.1
rN
VIH -
V IL -
1/01-16
Lour VOH-
VOL -
Hz
tOLZ
Hz
0-28
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
PRELIMINARY


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Upper Byte Read Modify Write Cycle
Static RAM
TC511632FUFTL-70/85/10
VIH
AO - A14 Vil
V1H -
U'OE Vil _ ~--------------------------++------~--------------------~~----------------------------------------~-------------------------------
'[QEiRFSHV1H
-
_
V'l ~--------------------------++------~--------------------~~----------------------------------------~-------------------------------
VIH _:-----=t:RC:S:~t:~-+---4-~-------!-J I0Il1--"';';';"'-'-+1 .u----!-'~~rI_-----
Vil -;...-_ _ _ _J
V1H _~--~==t=RC=S ~~~--~~----------~4J~------~----~~~~---------
V1l -;...-_ _ _ _J
V 1H
Vil
_- --------+-+--+-+-------.....-4-4----lt'-_~--....-~
1/09-1/016
LOUT VVOOH- L----Hz----~---+~-~
HZ
~N
VIH
VIL
-_--------~-~~------r---------------------
1/01-1/08
LOUT VVOOHL- ---H-z----~-----~
1/01-8: DIN = "W or "L"
• : "H" or -L"
PRELIMINARY
TOSHIBA AMERICA ELECTRONIC COMPONENTS. INC.
0-29


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TC511632FUFTL·70/85/10
Lower Byte Read Modify Write Cycle
VIH -
ct VIL-
Static RAM
~
VIH
VIL
-- ~........................~~....-+~....--------~------....................--....~+-------....-------
VIH -~--....- -............--;.-+-....""",
______________wtiR~SHV'L _
~~--~L---------~+-------------------~~---------------
iJWE V IH -
VIL -
VIH -
LWE
V IL -
D
~N
VIM -
VIL - - - - - - - - - -....--~~----;.~------------~~~----....~~----_++_----....- - - - - -....--
1/01-1/08
LOUT VVOOH - L-------H-z---....--~-----++---~
~N
VIM -
VIL ----------:-----;.~-------~------~.......------........--~
1109-1/016
L VoH-
HZ
OUT VOL---............------~----------~
Hz
0·30
TOSHIBA AMERICA ELECTRONIC COMPONENTS~ INC.
PRELIMINARY


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CE Only Refresh
Static RAM
TC511632FUFTL-70/85/10
VIH
AO- A7
V1L
TIDE V1H -
V1L -
lOEIRFSH V1H -
V 1L -
UWE. IWE V1H -
V 1L -
1101-11016 VOH-
VoL -
Auto Refresh
ADDRESS
tosc
tosc
OPEN
=NOTE :AS-A14 "Wor"L-
'["QE/RFSH V1H -
V1L -~_ _--J
1101-1/08 VOH-
OPEN
VOL ----------------------------
Self Refresh
a
i1H
V _~_ _ _
V1L -
NOTE: 'l:iN. UWE, IWt. AO - A 14 = ·W or -t-
.~
'['(5b~ V 1H -
VIL -';...._ _ _...J
1/01-V016 VOH - _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
VOL -
OPEN
NOTE : 'l:iN. UWE. 'i:W!. AO - A 14 = -W or ~.
PRELIMINARY
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