FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

August 2014
FPF3042
IntelliMAX18 V-Rated, Dual-Input, Single-Output,
Power-Source-Selector Switch
Features
Dual-Input, Single-Output Load Switch (DISO)
Input Supply Operating Range:
- 4.0 V~12.4 V at VIN
- 4.0 V~12.4 V at VBUS
Typical RON:
- 95 mΩ at VIN=5 V
- 70 mΩ at VBUS=5 V
Bidirectional Switch for VIN and VBUS
Slew Rate Controlled:
- 50 µs at VIN for < 4.7 µF COUT
- 90 µs at VBUS for < 4.7 µF COUT
Maximum ISW: 2.7 A per Channel
Break-Before-Make Transition
Under-Voltage Lockout (UVLO)
Over-Voltage Lockout (OVLO)
Thermal Shutdown
Logic CMOS IO Meets JESD76 Standard for GPIO
Interface and Related Power Supply Requirements
ESD Protected:
- Human Body Model: >3 kV
- Charged Device Model: >1.5 kV
- IEC 61000-4-2 Air Discharge: >15 kV
- IEC61000-4-2 Contact Discharge: >8 kV
Description
The FPF3042 is an 18 V-rated Dual-Input Single-Output
(DISO) load switch consisting of two channels of slew-
rate-controlled, low-on-resistance, N-channel MOSFET
switches with protection features. The slew-rate-
controlled turn-on characteristic prevents inrush current
and the resulting excessive voltage droop on the input
power rails. The input voltage range operates from 4.0 V
to 12.4 V at both VBUS and VIN to align with the needs of
high-voltage portable device power rails.
Both VIN and VBUS have the over-voltage protection of
14 V (typical) to avoid damage to the system.
VIN and VBUS bidirectional switching allows reverse
current from VOUT to VIN or VBUS for On-The-Go, (OTG)
Mode. The switching is controlled by logic input EN and
VIN_SEL is capable of interfacing directly with low-voltage
control signal General-Purpose Input / Output (GPIO).
FPF3042 is available in 1.76 mm x 1.96 mm Wafer-
Level Chip-Scale Package (WLCSP), 16-bump, 0.4 mm
pitch.
Applications
Input Power-Selection Block Supporting USB and
Wireless Charging
Smart Phone / Tablet PC
Ordering Information
Part Number
Top
Mark
Channel
FPF3042UCX TR
DISO
Typical RON per
Channel at 5 VIN
95 for VIN
70 for VBUS
Rise Time (tR)
Package
50 µs for VIN
90 µs for VBUS
16-Bump, 1.76 mm x 1.96 mm,
Wafer-Level Chip-Scale Package
(WLCSP), 0.4 mm Pitch
© 2013 Fairchild Semiconductor Corporation
FPF3042 • Rev. 1.0.1
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Application Diagram
CIN1
CIN2
OFF ON
VIN VOUT
VIN VOUT
VIN VOUT
VOUT
VBUS
VBUS
VBUS FPF3042
EN DF_IN
VIN_ SEL
Other_VIN_ AVA
GND GND
COUT
V_I/O
Figure 1. Typical Application
EN FPF3042 VOUT
1.8V GPIO
Q1
R1
20 kΩ
R2
30 kΩ
Charger
5V charging voltage at VOUT creates 3V at EN when
Q1 gate is LOW (OFF)
Note:
Q1 gate should be HIGH (ON) when not in OTG mode.
Figure 2. Example Circuit for OTG Operation with Low-Voltage GPIO
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
2
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Block Diagram
VIN
VIN
VIN
VBUS
VBUS
VBUS
EN
VIN_SEL
GND
GND
FPP3042
OVP
HV Power Device
SW1
C1
HV Power Device
SW2
C2
VMAX
VCC
Startup
Reference Voltage
Reference Current
Thermal Protection
VCC
VGATE
VREF
TSD
Gate Driver
&
Logic Control
Figure 3. Functional Block Diagram
C1
C2
VOUT
VOUT
VOUT
VOUT
Other_VIN_AVA
DF_IN
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
3
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Pin Configuration
Figure 4. Pin Assignment (Top View)
Figure 5. Pin Assignment (Bottom View)
Pin Description
Pin #
Name Input / Output
Description
A1, B1, C1
A4, B4, C4
A2, A3, B3, C3
VBUS
VIN
VOUT
C2 EN
D4 VIN_SEL
D3 DF_IN
B2
D1, D2
Other_VIN_AVA
GND
Input / Output
Input / Output
Input / Output
Input
Input / Output
Input
Output
VBUS at USB: Power input / output; bi-directional switch when
VIN_SEL = LOW.
VIN Supply Input: Power input / output; bi-directional switch
when VIN_SEL = HIGH.
Switch Output: Power input / output
Enable: Active HIGH;
EN voltage ≥ 2.5 V can power internal circuit when VIN and VBUS
are absent.
1 MΩ pull-down resistor is included.
Supply Selector & Status: Input power source selection input
and status output. This signal is ignored during EN=LOW.
Selector input during EN=HIGH:
HIGH = switch VIN to VOUT / LOW = switch VBUS to VOUT.
Status output during EN=LOW:
HIGH = VIN is used for VOUT / LOW = VBUS is used for VOUT.
Default Supply Selector during EN=LOW:
Floating = VBUS connects to VOUT.
LOW = VIN connects to VOUT.
This signal is ignored during EN=HIGH. 1 µA pull-up current
source is included.
Other Supply Input Status: Open-drain output.
HIGH-Z = both VIN and VBUS are valid.
LOW = the other power source is not valid.
Ground
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
4
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Table 1.
Truth Table
EN VIN>VUVLO VBUS>VUVLO VIN_SEL DF_IN
HIGH
X
X
LOW
X
HIGH
X
X HIGH X
LOW YES
NO HIGH X
LOW
NO
YES
LOW
X
LOW YES
YES
LOW Floating
LOW YES
YES
HIGH LOW
LOW
NO
NO X
Notes:
1. Internal pull-down at EN.
2. 1 µA pull-up current source at DF_IN.
X
Other_VIN_AVA
HI-Z if VIN & VBUS >VUVLO
LOW if VIN or VBUS <VUVLO
HI-Z if VIN & VBUS >VUVLO
LOW if VIN or VBUS <VUVLO
LOW
LOW
HIGH-Z
HIGH-Z
LOW
VOUT
Comment
VBUS
VIN
VOUT is selected by
VIN_SEL
Bidirectional channel
VIN
VBUS
Automatic selection to
valid input
VIN_SEL is output.
VBUS
VIN
VOUT is selected by
DF_IN
VIN_SEL is output.
Floating
OFF
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
5
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Absolute Maximum Ratings
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameters
Min. Max. Unit
VPIN
VIN, VBUS to GND
VOUT to GND(3)
Continuous
Pulsed, 100 ms Maximum Non-Repetitive
-1.4
18.0
-2.0
-0.3 16.0
EN, DF_IN, VIN_SEL, Other_VIN_AVA to GND
-0.3 6.0
TA=25°C
2.70
ISW Maximum Continuous Switch Current per Channel
TA=65°C
TA=75°C
2.70
2.50
TA=85°C
2.25
tPD Total Power Dissipation at TA=25°C
2.25
TJ Operating Junction Temperature
-40 +150
TSTG
ϴJA
Storage Junction Temperature
Thermal Resistance, Junction-to-Ambient (1in. Square Pad of 2 oz. Copper)
-65 +150
55(4)
Human Body Model, ANSI/ESDA/JEDEC JS-001-2012 3.0
ESD
Electrostatic
Discharge Capability
Charged Device Model, JESD22-C101
IEC61000-4-2 System Level(5)
Air Discharge
(VIN, VBUS to GND)
Contact Discharge
(VIN, VBUS to GND)
1.5
15.0
8.0
Notes:
3. If an external voltage of more than 13 V is applied to VOUT, the slew rate should be <1 V/ms from 13 V.
4. Measured using 2S2P JEDEC standard PCB.
5. System-level ESD can be guaranteed by design.
V
A
W
°C
°C
°C/W
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameters
Min. Max. Unit
VPIN
VIN
VBUS
TA Ambient Operating Temperature
4.0 12.4
4.0 12.4
V
-40 +85 °C
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
6
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Electrical Characteristics
VIN=4 to 12.4 V, VBUS=4 to 12.4 V, TA=-40 to 85°C unless otherwise noted. Typical values are at VIN=VBUS=5 V,
EN=HIGH and TA=25°C unless otherwise noted.
Symbol
Parameters
Condition
Min. Typ. Max. Unit
VIN
VBUS
Input Voltage from VIN
Input Voltage from VBUS
IQ Quiescent Current
On Resistance for VIN
RON
On Resistance for VBUS
VIH Input Logic High Voltage
VIL Input Logic Low Voltage
VEN(OTG) EN Voltage in OTG Mode(6)
REN_PD Pull-Down Resistance at EN
Protection
IOUT=0 mA, EN=HIGH, VIN or VBUS=5 V
IOUT=0 mA, EN=5 V, VIN and VBUS=GND
VIN=12 V, IOUT=200 mA, TA=25°C
VIN=8 V, IOUT=200 mA, TA=25°C
VIN=5 V, IOUT=200 mA, TA=25°C
VIN=5 V, IOUT=200 mA,
TA=25°C to 85°C(6)
VBUS=12 V, IOUT=200 mA, TA=25°C
VBUS=6 V, IOUT=200 mA, TA=25°C
VBUS=5 V, IOUT=200 mA, TA=25°C
VBUS=5 V, IOUT=200 mA,
TA=25°C to 85°C(6)
VIN, VBUS = 4.0 V~12.4 V
VIN, VBUS =4.0 V~12.4 V
VIN & VBUS=Float or VIN & VBUS <VUVLO
4.0
4.0
1.15
2.5
55
33
95
95
95
70
70
70
1000
12.4
12.4
120
70
150
200
100
140
0.52
V
V
μA
μA
V
V
V
VIN or VBUS Rising
VUVLO Under-Voltage Lockout Threshold
VIN or VBUS Falling
3.05
2.55
VUVHYS Under-Voltage Lockout Hysteresis
VIN Rising Threshold
12.9
VOVLO Over-Voltage Lockout Threshold
VIN Falling Threshold
VBUS Rising Threshold
12.4
12.9
VBUS Falling Threshold
12.4
VIN
VOVHYS Over-Voltage Lockout Hysteresis
VBUS
TSDN Thermal Shutdown Threshold
TSDNHYS Thermal Shutdown Hysteresis
Reverse Current Blocking (RCB)
IRCB VIN or VBUS Current During RCB VOUT=8 V, VIN or VBUS=GND
Dynamic Characteristics
VOUT Rise Time, VBUS(6,7)
tR VOUT Rise Time, VIN(6,7)
tF VOUT Fall Time(6,7)
tTRAN Transition Delay(6,7)
tSD Selection Delay(6,7)
VIN=VBUS=5 V, RL=150 Ω, CL=4.7 μF,
TA=25°C
50
Notes:
6. This parameter is guaranteed by characterization and/or design; not production tested.
7. tSD/tTRAN/tR/tF are defined in Figure 6.
3.50
3.00
0.5
14.0
13.5
14.0
13.5
0.5
0.5
150
20
90
50
1.4
100
50
4.00
3.55
15.0
14.5
15.0
14.5
30
V
V
V
V
V
V
V
V
V
°C
°C
μA
μs
ms
ms
μs
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
7
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Timing Diagram
Figure 6. Transition Delay (VIN=VBUS=5 V)
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
8
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Typical Characteristics
Figure 7. VIN Quiescent Current (Iq) vs. Temperature Figure 8. VBUS Quiescent Current (Iq) vs. Temperature
Figure 9. VIN Quiescent Current vs. Supply Voltage Figure 10.VBUS Quiescent Current vs. Supply Voltage
Figure 11.VIN On Resistance (mΩ) vs. Temperature Figure 12.VBUS On Resistance (mΩ) vs. Temperature
Figure 13.VIN On Resistance (mΩ) vs. Supply Voltage Figure 14.VBUS On Resistance (mΩ) vs. Supply Voltage
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
9
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Typical Characteristics (Continued)
Figure 15.VIN_SEL Input Logic HIGH & Low Voltage
vs. Temperature
Figure 16.EN Input Logic HIGH & Low Voltage
vs. Temperature
Figure 17.DF_IN Logic HIGH & Low Voltage
vs. Temperature
Figure 18.VIN_VULVO vs. Temperature
Figure 19.VBUS_VULVO vs. Temperature
Figure 20.VIN_VOVLO vs. Temperature
Figure 21.VBUS_VOVLO vs. Temperature
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
10
Figure 22.VOUT tR vs. Temperature
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Typical Characteristics (Continued)
Figure 23.VOUT tF vs. Temperature
Figure 24.tTRAN vs. Temperature
Figure 25.Power Source Transition (VIN=VBUS=5 V,
EN=HIGH, VIN_SEL=LOWHIGHLOW,
COUT=4.7 µF, RL=150 )
Figure 26.VIN On Response (VIN=GND5 V,
VBUS=EN=GND, COUT=4.7 µF, RL=150 )
Figure 27.VBUS On Response (VBUS=GND5 V,
VIN=EN=GND, COUT=4.7 µF, RL=150 Ω)
Figure 28.Off Response (VIN=VBUS=5 V, EN=HIGH,
VIN_SEL=LOHIGH or HIGHLOW, COUT=4.7 µF,
RL=150 Ω)
Figure 29.VIN Over-Voltage Protection Response
(VIN=5 V15 V, VBUS=5 V, EN=VIN_SEL=HIGH,
COUT=4.7 µF, RL=150 )
Figure 30.VBUS Over-Voltage Protection Response
(VBUS=5 V15 V, VIN=5 V, EN=HIGH,
VIN_SEL=LOW, COUT=4.7 µF, RL=150 )
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
11
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Operation and Application Information
The FPF3042 is an 18 V, 2.7 A-rated, Dual-Input Single-
Output (DISO) N-channel MOSFET load switch with
slew-rate-controlled and low on resistance. The input
operating range is from 4 V to 12.4 V at VBUS and at VIN.
The internal circuitry is powered from the highest
voltage source among VIN, VBUS, and EN.
Input Power-Source Selection
The input power source can be selected by VIN_SEL and
DF_IN, respectively, depending on the EN state. When
EN is HIGH, the input source is selected by VIN_SEL
regardless of DF_IN. If VIN_SEL is LOW, VBUS is selected.
If VIN_SEL is HIGH, VIN is selected.
Table 2. Input Power Selection by VIN_SEL
EN VIN>VUVLO VBUS>VUVLO VIN_SEL DF_IN VOUT
HIGH
X
X
LOW
X VBUS
HIGH
X
X HIGH X VIN
When EN is LOW, the input source is selected by
DF_IN and the number of valid input sources. If only
one input source is valid (greater than VUVLO(MAX)), the
source is selected automatically, regardless of DF_IN,
to make charging path in case the battery is depleted. If
both VBUS and VIN have valid input sources, the input
source is selected by DF_IN. If DF_IN is LOW, VIN is
selected. If DF_IN is HIGH or floating, VBUS is selected.
DF_IN is biased HIGH with an internal 1 µA pull-up
current source.
Table 3. Input Power Selection by DF_IN
EN VIN>VUVLO VBUS>VUVLO VIN_SEL DF_IN VOUT
LOW YES
NO HIGH X VIN
LOW NO
YES
LOW X
VBUS
LOW
LOW
LOW
YES
YES
NO
YES
YES
NO
LOW Floating VBUS
HIGH LOW VIN
X X Floating
VIN_SEL can be the status output to indicate which input
power source is used during EN is LOW. If VIN is used,
VIN_SEL shows HIGH. If VBUS is used, VIN_SEL shows
LOW. The voltage level of HIGH signal is 5.3 V if any
one of VIN, VBUS, or EN is higher than 5.3 V. The signal
is highest voltage among VIN, VBUS, and EN if none of
them is higher than 5.3 V.
EN Voltage for Control Logic Power Supply
Internal control logic is powered from the highest
voltage among VIN, VBUS, and VEN. If valid VIN or VBUS
higher than UVLO is applied, ON/OFF control by EN
should be accomplished with VIH/VIL. If EN powers the
internal control block without valid VIN and VBUS, more
than 2.5 V is required on the EN pin to operate properly.
Over-Voltage Protection (OVP)
The FPF3042 includes over-voltage protection at both VIN
and VBUS. If VIN or VBUS is higher than 14 V (typical), the
power switch is off until input voltage is lower than the
over-voltage trip level by a hysteresis voltage of 0.5 V.
Reverse Power Supply for OTG
The bidirectional switch allows reverse power for On-The-
Go (OTG) operation. Even if both VIN and VBUS are
unavailable, reverse power can be supported if internal
control circuitry is powered by EN.
Reverse-Current Blocking (RCB)
FPF3042 supports reverse-current blocking during EN
LOW and an unselected channel.
Thermal Shutdown
During thermal shutdown, the power switch is turned off
if junction temperature exceeds 150°C to avoid damage.
Wireless Charging System
FPF3042 can be used as an input power selector
supporting Travel Adaptor (TA) and Wireless Charging
(WC) with a single-input-based battery charger or Power
Management IC (PMIC), including a charging block as
shown in Figure 31. The system can recognize an input
power source change between 5 V TA and 5 V WC
without detection circuitry because FPF3042 has a
100 ms transition delay. OTG Mode can be supported
without an additional power path, such as a MOSFET.
Travel Adaptor
Wireless Charging
FPF3042
VBUS
VOUT
VIN
PMIC
with
BAT Charger &
OTG Boost &
Power Path
VIN_SEL, Other_VIN_Ava
System
Li-Pol
BAT
EN, VIN_SEL, DF_IN
Figure 31.Input Power Selector for Wireless Charging System
© 2013 Fairchild Semiconductor Corporation
FPF3042 Rev. 1.0.1
12
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

Product Specific Package Information
DE
1.96 mm ±0.03 mm
1.76 mm ±0.03 mm
X
0.28 mm
Y
0.38 mm
© 2013 Fairchild Semiconductor Corporation
FPF3042 • Rev. 1.0.1
13
www.fairchildsemi.com


FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File



FPF3042 Datasheet PDF
No Preview Available !

Click to Download PDF File

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 3036752175 or 8003443860 Toll Free USA/Canada
Fax: 3036752176 or 8003443867 Toll Free USA/Canada
Email: orderlit@onsemi.com
© Semiconductor Components Industries, LLC
N. American Technical Support: 8002829855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81358171050
www.onsemi.com
1
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
www.onsemi.com



Click to Download PDF File