Fairchild Semiconductor Electronic Components Datasheet



FPF1203L

Slew-Rate-Controlled Load Switch


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August 2016
FPF1203 / FPF1203L / FPF1204 / FPF12045
IntelliMAXUltra-Small, Slew-Rate-Controlled Load Switch
Features
1.2 V to 5.5 V Input Voltage Operating Range
Typical RON:
45 mΩ at VIN=5.5 V
55 mΩ at VIN=3.3 V
90 mΩ at VIN=1.8 V
185 mΩ at VIN=1.2 V
Slew Rate Control with tR:
FPF1203/FPF1203l/FPF1204: 100 µs
FPF12045: 2 µs
Output Discharge Function on FPF1204 / 45
Low <1.5 µA Quiescent Current
ESD Protected: Above 7 kV HBM, 2 kV CDM
GPIO / CMOS-Compatible Enable Circuitry
4-Bump, WLCSP 0.76 mm x 0.76 mm,
0.4 mm Pitch
Description
The FPF1203 / 03L / 04 / 45 are ultra-small integrated
IntelliMAXload switches with integrated P-channel
switch and analog control features. Integrated slew-
rate control prevents inrush current and the resulting
excessive voltage drop on the power rail. The input
voltage range operates from 1.2 V to 5.5 V to provide
power-disconnect capability for post-regulated power
rails in portable and consumer products. The low shut-
off current allows power designs to meet standby and
off-power drain specifications.
The FPF120x are controlled by a logic input (ON pin)
compatible with standard CMOS GPIO circuitry found
on Field Programmable Gate Array (FPGA) embedded
processors. The FPF120x are available in 0.76 mm x
0.76 mm 4-bump WLCSP.
Applications
Mobile Devices and Smart Phones
Portable Media Devices
Tablet PCs
Advanced Notebook, UMPC, MID
Portable Medical Devices
GPS and Navigation Equipment
Ordering Information
Part Number
Top
Mark
FPF1203UCX
FPF1203LUCX
FPF1204UCX
FPF1204UCX_F013
(Amkor Assembly Only)
FPF1204BUCX
(Backside Laminate)
FPF12045UCX
QL
QP
QM
QM
QM
NC
Switch
(Typical)
at 3.3VIN
55
55
55
55
55
55
Output
ON Pin
Discharge Activity
tR
Package
NA
NA
65 Ω
65 Ω
65 Ω
65 Ω
Active HIGH
Active LOW
Active HIGH
Active HIGH
Active HIGH
100 µs
100 µs
100 µs 4-Bump, Wafer-Level Chip-
Scale Package (WLCSP),
100 µs 0.76 mm x 0.76 mm,
0.4 mm Pitch
100 µs
Active HIGH 2 µs
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
www.fairchildsemi.com


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Application Diagram
VIN
+
- CIN
VIN VOUT
FPF1203/03L/04/45
ON GND
VOUT
COUT
Figure 1. Typical Application
Functional Block Diagram
FPF1203/03L/04/45
VIN
ON
R
CONTROL
LOGIC
ESD Protection
Turn-On Slew Rate
Controlled Driver
Output Discharge
(Optional)
VOUT
GND
Figure 2. Functional Block Diagram (Output Discharge for FPF1204 / 45)
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
2
www.fairchildsemi.com


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Pin Configurations
Figure 3. WLCSP Bumps Facing Down
(Top View)
Figure 4. WLCSP Bumps Facing Up
(Bottom View)
VOUT
A1
A2 VIN
GND B1
B2 ON
Figure 5. Pin Assignments (Top View)
VIN A2
A1 VOUT
ON B2
B1 GND
Figure 6. Pin Assignments (Bottom View)
Pin Definitions
Pin #
A1
A2
B1
B2
B2
Name
VOUT
VIN
GND
ON
ON
Description
Switch output
Supply input: input to the power switch
Ground
ON/OFF Control, active HIGH; FPF1203/04/45
ON/OFF Control, active LOW; FPF1203L
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
3
www.fairchildsemi.com


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Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VIN
ISW
PD
TSTG
JA
VIN, VOUT, VON to GND
Maximum Continuous Switch Current at Ambient Operating Temperature
Power Dissipation at TA=25°C
Storage Temperature Range
Thermal Resistance, Junction-to-Ambient
1S2P with One Thermal Via(1)
1S2P without Thermal Via(2)
ESD Electrostatic Discharge Capability(1,2)
Human Body Model,
JESD22-A114
Charged Device Model,
JESD22-C101
Notes:
1. Measured using 2S2P JEDEC std. PCB.
2. Measured using 2S2P JEDEC PCB COLD PLATE Method.
Min.
-0.3
-65
7
2
Max.
6.0
2.2
1.0
+150
110
95
Unit
V
A
W
°C
°C/W
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
VIN Input Voltage
TA Ambient Operating Temperature
Min.
1.2
-40
Max.
5.5
+85
Unit
V
°C
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
4
www.fairchildsemi.com


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Electrical Characteristics
Unless otherwise noted, VIN=1.2 V to 5.5 V and TA=-40 to +85°C. Typical values are at VIN=3.3 V and TA=25°C.
Symbol
Parameter
Condition
Min. Typ. Max. Unit
Basic Operation
VIN
IQ(OFF)
ISD
IQ
RON
RPD
Supply Voltage
Off Supply
Current
FPF1203/04/45 VON=GND, VOUT=Open, VIN=5.5 V
FPF1203L
VON=VIN, VOUT=Open, VIN=5.5 V
Shutdown
Current
FPF1203/04/45 VON=GND, VOUT=GND
FPF1203L
VON=VIN, VOUT=GND
Quiescent
Current
FPF1203/04/45 IOUT=0 mA, VON=VIN, =5.5 V
FPF1203L
IOUT=0 mA, VON=GND, VIN, = 5.5 V
VIN=5.5 V, IOUT=200 mA, TA=25°C
VIN=3.3 V, IOUT=200 mA, TA=25°C
On Resistance
VIN=1.8 V, IOUT=200 mA, TA=25°C
VIN=1.2 V, IOUT=200 mA, TA=25°C
VIN=1.8 V, IOUT=200 mA, TA=85°C(3)
Output Discharge RPULL DOWN
VIN=3.3 V, VON=OFF,
IFORCE=20 mA, TA=25°C,
FPF1204 / FPF12045
1.2
5.5
0.1 1.0
1.0 2.0
0.1 1.0
1.2 3.0
V
μA
μA
0.1 1.5
μA
45 55(3)
55 65(3)
90 100(3)
185 220(3)
105
65 75
Ω
VIH On Input Logic HIGH Voltage
VIN=1.2 V to 5.5 V
1.15
V
VIL On Input Logic LOW Voltage
VIN=1.2 V to 5.5 V
RON_PD Pull-Down Resistance at ON Pin
ION On Input Leakage
Dynamic Characteristics
tDON
tR
tON
tDON
tR
tON
tDOFF
tF
tOFF
tDOFF
tF
tOFF
tDOFF
tF
tOFF
tDOFF
tF
tOFF
Turn-On Delay(4)
VOUT Rise Time(4)
Turn-On Time(6)
Turn-On Delay(4)
VOUT Rise Time(4)
Turn-On Time(6)
Turn-Off Delay(4,5)
VOUT Fall Time(4,5)
Turn-Off Time(5,7)
Turn-Off Delay(4,5)
VOUT Fall Time(4,5)
Turn-Off Time(5,7)
Turn-Off Delay(4,5)
VOUT Fall Time(4,5)
Turn-Off Time(5,7)
Turn-Off Delay(4,5)
VOUT Fall Time(4,5)
Turn-Off Time(5,7)
VIN=1.2 V to 5.5 V
VON=VIN or GND
VIN=3.3 V, RL=10 Ω, CL=0.1 µF,
TA=25°C, FPF12045
VIN=3.3 V, RL=10 Ω, CL=0.1 µF,
TA=25°C, FPF1203L
VIN=3.3 V, RL=500 Ω, CL=0.1 µF,
TA=25°C, FPF1203L
VIN=3.3 V, RL=10 Ω, CL=0.1 µF,
TA=25°C, FPF1203
VIN=3.3 V, RL=500 Ω, CL=0.1 µF,
TA=25°C, FPF1203
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
5
0.65 V
8.3
1 μA
70
100
170 μs
2
2
4
0.5
2.0 μs
2.5
6
115 μs
121
4.0
2.9 μs
7.3
6
115 μs
121
Continued on the following page…
www.fairchildsemi.com


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Electrical Characteristics
Unless otherwise noted, VIN=1.2 V to 5.5 V and TA=-40 to +85°C. Typical values are at VIN=3.3 V and TA=25°C.
Symbol
Parameter
Condition
Min.
tDOFF
tF
tOFF
tDOFF
tF
tOFF
Turn-Off Delay(4,5)
VOUT Fall Time(4,5)
Turn-Off Time(5,7)
Turn-Off Delay(4,5)
VOUT Fall Time(4,5)
Turn-Off Time(5,7)
VIN=3.3 V, RL=10 Ω, CL=0.1 µF,
TA=25°C, FPF1204/45(5)
VIN=3.3 V, RL=500Ω, CL=0.1 µF,
TA=25°C, FPF1204/45(5)
Notes:
3. This parameter is guaranteed by design and characterization; not production tested.
4. tDON/tDOFF/tR/tF are defined in Figure 23.
5. Output discharge enabled during off-state.
6. tON=tR + tDON.
7. tOFF=tF + tDOFF.
Typ.
4.0
2.5
6.5
6
11
17
Max.
Unit
μs
μs
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
6
www.fairchildsemi.com


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Typical Performance Characteristics
Figure 7. Shutdown Current vs. Temperature
Figure 8. Shutdown Current vs. Supply Voltage
Figure 9. Off Supply Current vs. Temperature
(VOUT Floating)
Figure 10. Off Supply Current vs. Supply Voltage
(VOUT Floating)
Figure 11. Quiescent Current vs. Temperature
Figure 12. Quiescent Current vs. Supply Voltage
Figure 13. RON vs. Temperature
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
Figure 14. RON vs. Supply Voltage
www.fairchildsemi.com
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Typical Performance Characteristics (Continued)
100
10
1
RDS(ON) Limit
Single Pulse
RqJA = 110oC/W
0.1 TA = 25oC
100µs
1ms
10ms
100ms
1s
10s
DC
Figure 15. ON Pin Threshold vs. VIN
0.01
0.1
1
VDS, DRAIN-SOURCE VOLTAGE (V)
10
Figure 16. Drain Current vs. Drain-Source Voltage
Safe Operating Area
Figure 17. Turn-On Response FPF1203 / 04
(VIN=3.3 V, CIN=1 µF, COUT=0.1 µF, RL=10 Ω)
Figure 18. Turn-Off Response FPF1203
(VIN=3.3 V, CIN=1 µF, COUT=0.1 µF, RL=10 Ω)
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
Figure 19. Turn-Off Response FPF1203
(VIN=3.3 V, CIN=1 µF, COUT=0.1 µF, RL=500 Ω)
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Typical Performance Characteristics (Continued)
Figure 20. Turn-Off Response (VIN=3.3 V, CIN=1 µF,
COUT=0.1 µF, RL=10 Ω, FPF1204 / 45)
Figure 21. Turn-Off Response (VIN=3.3 V, CIN=1 µF,
COUT=0.1 µF, RL=500 Ω, FPF1204 / 45)
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
9
www.fairchildsemi.com


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Operation and Application Description
The FPF1203 / 03L / 04 / 045 are low-RON P-channel
load switches with controlled turn-on. The core of each
device is a 55 mP-channel MOSFET and controller
capable of functioning over a wide input operating range
of 1.2 to 5.5 V.
The FPF1204 / 45 contain a 65 on-chip load resistor
for quick output discharge when the switch is turned off.
The FPF12045 features a faster VOUT Rise Time of 5 μs.
Output Capacitor
A 0.1 µF capacitor, COUT, should be placed between the
VOUT and GND pins. This capacitor prevents parasitic
board inductance from forcing VOUT below GND when
the switch is on. CIN greater than COUT is highly
recommended. COUT greater than CIN can cause VOUT to
exceed VIN when the system supply is removed. This
could result in current flow through the body diode from
VOUT to VIN.
VIN
+
- CIN OFF ON
VIN VOUT
FPF1204
ON GND
VOUT
COUT
Figure 22. Typical Application
Input Capacitor
To limit the voltage drop on the input supply caused by
transient inrush current when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor
must be placed between the VIN and GND pins. A 1 µF
ceramic capacitor, CIN, placed close to the pins is
usually sufficient. Higher-value CIN can be used to
reduce the voltage drop in higher-current applications.
Figure 23. Timing Diagram for FPF1203/4/045
Board Layout
For best performance, traces should be as short as
possible. To be most effective, input and output
capacitors should be placed close to the device to
minimize the effect of parasitic trace inductance on
normal and short-circuit operation. Using wide traces or
large copper planes for all pins (VIN, VOUT, ON, and
GND) minimizes the parasitic electrical effects and the
case-ambient thermal impedance. However, the VOUT
pin should not connect directly to the battery source due
to the discharge mechanism of the load switch.
The table below pertains to the Packaging information on the following page.
Product Dimensions
D
760 µm ± 30 µm
E
760 µm ± 30 µm
X
0.180 mm± 0.018 µm
Y
0.180 mm± 0.018 µm
© 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 • Rev. 1.14
10
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0.03 C
2X
E
F
A
B
BALL A1
INDEX AREA
D
TOP VIEW
0.03 C
2X
0.05 C
0.06 C
0.539
0.461
E
0.40
A1
0.40
Ø0.20
Cu Pad
Ø0.30
Solder Mask
RECOMMENDED LAND PATTERN
(NSMD PAD TYPE)
0.292±0.018
0.208±0.021
C SEATING PLANE
D SIDE VIEWS
0.005 C A B
Ø0.260±0.020
0.40 4X
0.40
B (Y)±0.018
A
12
F
(X)±0.018
BOTTOM VIEW
NOTES:
A. NO JEDEC REGISTRATION APPLIES.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCE
PER ASME Y14.5M, 1994.
D. DATUM C IS DEFINED BY THE SPHERICAL
CROWNS OF THE BALLS.
E. PACKAGE NOMINAL HEIGHT IS 500 MICRONS
±39 MICRONS (461-539 MICRONS).
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
G. DRAWING FILNAME: MKT-UC004AFrev2.


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