FDMC8200S Datasheet PDF
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March 2011
FDMC8200S
Dual N-Channel PowerTrench® MOSFET
30 V, 10 mΩ, 20 mΩ
Features
Q1: N-Channel
„ Max rDS(on) = 20 mΩ at VGS = 10 V, ID = 6 A
„ Max rDS(on) = 32 mΩ at VGS = 4.5 V, ID = 5 A
Q2: N-Channel
„ Max rDS(on) = 10 mΩ at VGS = 10 V, ID = 8.5 A
„ Max rDS(on) = 13.5 mΩ at VGS = 4.5 V, ID = 7.2 A
„ RoHS Compliant
General Description
This device includes two specialized N-Channel MOSFETs in a
due power33(3mm X 3mm MLP) package. The switch node has
been internally connected to enable easy placement and routing
of synchronous buck converters. The control MOSFET (Q1) and
synchronous MOSFET (Q2) have been designed to provide
optimal power efficiency.
Applications
„ Mobile Computing
„ Mobile Internet Devices
„ General Purpose Point of Load
Pin 1
Bottom
D1
D1
D1
G1
D1
D2/S1
S2
S2
S2
G2
Bottom
VIN VIN
GHSVIN
VIN
SWITCH
NODE
GND
GND
GND
GLS
5 Q2
6
7
8
4
3
2
1
Q1
Power33
MOSFET Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation for Single Operation
TA = 25°C
Power Dissipation for Single Operation
TA = 25°C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 4)
(Note 3)
Q1 Q2
30 30
±20 ±20
18 13
23 46
6 1a 8.5 1b
40 27
12
1.9 1a
0.7 1c
32
2.5 1b
1.0 1d
-55 to +150
Units
V
V
A
W
°C
RθJA
RθJA
RθJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Package Marking and Ordering Information
65 1a
180 1c
7.5
50 1b
125 1d
4.2
°C/W
Device Marking
FDMC8200S
Device
FDMC8200S
Package
Power 33
Reel Size
13”
Tape Width
12 mm
Quantity
3000 units
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
1
www.fairchildsemi.com


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Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, VGS = 0 V
ID = 1mA, VGS = 0 V
ID = 250 μA, referenced to 25°C
ID = 1mA, referenced to 25°C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
Type Min Typ Max Units
Q1 30
Q2 30
V
Q1
Q2
14
13
mV/°C
Q1
Q2
1
500
μA
Q1 100 nA
Q2 100 nA
On Characteristics
VGS(th)
ΔVGS(th)
ΔTJ
rDS(on)
gFS
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 1mA
ID = 250 μA, referenced to 25°C
ID = 1mA, referenced to 25°C
VGS = 10 V, ID = 6 A
VGS = 4.5 V, ID = 5 A
VGS = 10 V, ID = 6 A, TJ = 125°C
VGS = 10 V, ID = 8.5 A
VGS = 4.5 V, ID = 7.2 A
VGS = 10 V, ID = 8.5 A, TJ = 125°C
VDD = 5 V, ID = 6 A
VDD = 5 V, ID = 8.5 A
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
1.0 2.3 3.0
1.0 2.0 3.0
V
-5
-6
mV/°C
16 20
24 32
22 28
mΩ
7.8 10.0
10.3 13.5
11.4 13.1
29
43
S
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
Rg Gate Resistance
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
495 660
1080 1436
pF
Q1
Q2
145 195
373 495
pF
Q1
Q2
20
35
30
52
pF
Q1 0.2 1.4 4.2
Q2 0.2 1.2 3.6
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr Rise Time
td(off)
Turn-Off Delay Time
tf Fall Time
Qg(TOT)
Total Gate Charge
Qg(TOT)
Total Gate Charge
Qgs Gate to Source Charge
Qgd Gate to Drain “Miller” Charge
Q1
VDD = 15 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
Q2
VDD = 15 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V Q1
VDD = 15 V,
VGS = 0 V to 4.5 V ID = 6 A
Q2
VDD = 15 V
ID = 8.5 A
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
11 20
7.6 15
3.1 10
1.8 10
35 56
21 34
1.3 10
8.5 17
7.3 10
15.7 22
3.1 4.3
7.2 10
1.8
3
1
1.9
ns
ns
ns
ns
nC
nC
nC
nC
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
2
www.fairchildsemi.com


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Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Drain-Source Diode Characteristics
VGS = 0 V, IS = 6 A
(Note 2)
VSD
Source-Drain Diode Forward Voltage VGS = 0 V, IS = 8.5 A
(Note 2)
VGS = 0 V, IS = 1.3 A
(Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
Q1
IF = 6 A, di/dt = 100 A/s
Q2
IF = 8.5 A, di/dt = 300 A/s
Q1
Q2
Q2
Q1
Q2
Q1
Q2
0.8 1.2
0.8 1.2
0.6 0.8
V
13
20
24
32
ns
2.3
15
10
24
nC
Notes:
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined
by the user's board design.
a.65 °C/W when mounted on
a 1 in2 pad of 2 oz copper
b.50 °C/W when mounted on
a 1 in2 pad of 2 oz copper
c. 180 °C/W when mounted on a
minimum pad of 2 oz copper
d. 125 °C/W when mounted on a
minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3.Starting Q1: T = 25 °C, L = 1 mH, I = 5 A, Vgs = 10V, Vdd = 27V, 100% test at L = 3 mH, I = 4 A; Q2: T = 25°C, L = 1 mH, I = 8 A, Vgs = 10V, Vdd = 27V,
100% test at L = 3 mH, I = 3.2 A.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
3
www.fairchildsemi.com


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Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
40
VGS = 10 V
VGS = 6 V
30 VGS = 4.5 V
20
VGS = 4 V
10
0
0.0
VGS = 3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0.5 1.0 1.5 2.0 2.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
3.0
Figure 1. On Region Characteristics
4
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3
VGS = 3.5 V
VGS = 4 V
2
VGS = 4.5 V
1
VGS = 6 V VGS = 10 V
0
0 10 20 30 40
ID, DRAIN CURRENT (A)
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6
ID = 6 A
VGS = 10 V
1.4
1.2
1.0
0.8
-75 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On Resistance
vs Junction Temperature
100
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
80
ID = 6 A
60
TJ = 125 oC
40
20
TJ = 25 oC
0
2468
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
10
40
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
30
VDS = 5 V
20
10
0
2.0
TJ = 150 oC
TJ = 25 oC
TJ = -55 oC
2.5 3.0 3.5 4.0
VGS, GATE TO SOURCE VOLTAGE (V)
4.5
Figure 5. Transfer Characteristics
40
VGS = 0 V
10
1
TJ = 150 oC
0.1
TJ = 25 oC
0.01
TJ = -55 oC
0.001
0.2
0.4 0.6 0.8 1.0
VSD, BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
4
www.fairchildsemi.com


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Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
10
ID = 6 A
8
VDD = 15 V
6
VDD = 10 V
4
VDD = 20 V
2
0
0246
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
8
1000
100
Ciss
Coss
Crss
f = 1 MHz
VGS = 0 V
10
0.1
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure8. CapacitancevsDrain
to Source Voltage
8
7
6
5
4
TJ = 25 oC
3
TJ = 100 oC
2
TJ = 125 oC
1
0.01
0.1 1
tAV, TIME IN AVALANCHE (ms)
Figure9. UnclampedInductive
Switching Capability
7
25
20
15
Limited by Package
10
5
RθJC = 7.5 oC/W
VGS = 10 V
VGS = 4.5 V
0
25 50 75 100 125
Tc, CASE TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
150
15000
1100
10100u0sus
1 ms
1
1
1 m10sms
THTIHSISARAERAEAISIS
0.1 LIMLIIMTEITDEDBYBYrDrSD(Son(o)n)
101m00s ms
1010 sms
0.1
0.01
0.01
SINGLE PULSSIENGLE PULSE
TJ = MAX RATTJE=DMAX RATED
RθJA = 180 oCR/θWJA = 125 oC/W
TC = 25 oC TA = 25 oC
1 s10 s
10DsC
DC
0.0001.01
0.1
1
10 100200
0.01
0.1 1
10
VDS, DRAIN to SOURCE VOLTAGE (V)
VDS, DRAIN to SOURCE VOLTAGE (V)
100200
Figure 11. Forward Bias Safe
Operating Area
100
VGS = 10 V
10
1
0.1
0.001
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
0.01 0.1
1
10
t, PULSE WIDTH (sec)
100 1000
Figure 12. Single Pulse Maximum
Power Dissipation
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
5
www.fairchildsemi.com


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Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.1 0.02
0.01
0.01
SINGLE PULSE
RθJA = 180 oC/W
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJc + TC
0.003
10-4
10-3
10-2
10-1
1
10
t, RECTANGULAR PULSE DURATION (sec)
100
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
1000
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
6
www.fairchildsemi.com


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Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted
27
VGS = 10 V
VGS = 4.5 V
VGS = 4 V
18 VGS = 3.5 V
VGS = 3 V
9
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0 0.5 1.0 1.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 14. On- Region Characteristics
4
PULSE DURATION = 80 μs
VGS = 3 V
DUTY CYCLE = 0.5% MAX
3
VGS = 3.5 V
2
VGS = 4 V
1
VGS = 4.5 V
VGS = 10 V
0 9 18
ID, DRAIN CURRENT (A)
27
Figure 15. Normalized on-Resistance vs Drain
Current and Gate Voltage
1.6
ID = 8.5 A
VGS = 10 V
1.4
1.2
1.0
0.8
-75 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 16. Normalized On-Resistance
vs Junction Temperature
100
PULSE DURATION = 80 μs
ID = 8.5 A DUTY CYCLE = 0.5% MAX
80
60
40
TJ = 125 oC TJ = 25 oC
20
0
2468
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs Gate to
Source Voltage
10
27
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VDS = 5 V
18
TJ = 150 oC
9
TJ = 25 oC
TJ = -55 oC
0
1.0 1.5 2.0 2.5 3.0 3.5 4.0
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 18. Transfer Characteristics
30
10 VGS = 0 V
TJ = 150 oC
1
TJ = 25 oC
0.1
0.01
TJ = -55 oC
0.001
0.0
0.2 0.4 0.6 0.8 1.0
VSD, BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 19. Source to Drain Diode
Forward Voltage vs Source Current
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
7
www.fairchildsemi.com


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Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted
10
ID = 8.5 A
8
VDD = 15 V
6
VDD = 10 V
VDD = 20 V
4
2
0
0 2 4 6 8 10 12 14 16
Qg, GATE CHARGE (nC)
Figure 20. Gate Charge Characteristics
3000
1000
100
Ciss
Coss
f = 1 MHz
VGS = 0 V
Crss
10
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 21. Capacitance vs Drain
to Source Voltage
20
10
TJ = 25 oC
TJ = 100 oC
TJ = 125 oC
1
0.01
0.1 1
10 30
tAV, TIME IN AVALANCHE (ms)
Figure 22. Unclamped Inductive
Switching Capability
15
12
VGS = 10 V
9
6 VGS = 4.5 V
Limited by package
3
RθJA = 50 oC/W
0
25 50 75 100 125
TA, CASE TEMPERATURE (oC)
150
Figure 23. Maximum Continuous Drain
Current vs Case Temperature
50
10 100 us
1 THIS AREA IS
LIMITED BY rDS(on)
1 ms
10 ms
100 ms
0.1
0.01
0.01
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
0.1 1
1s
10 s
DC
10 100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 24. Forward Bias Safe
Operating Area
100
VGS = 10 V
10
1
0.1
0.001
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
0.01 0.1 1 10
t, PULSE WIDTH (sec)
100 1000
Figure 25. Single Pulse Maximum Power
Dissipation
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
8
www.fairchildsemi.com


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Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.001
10-4
SINGLE PULSE
RθJA = 125 oC/W
(Note 1b)
10-3
10-2
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
10-1 1
t, RECTANGULAR PULSE DURATION (sec)
10
100
Figure 26. Junction-to-Ambient Transient Thermal Response Curve
1000
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
9
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Typical Characteristics (continued)
SyncFET Schottky body diode
Characteristics
Fairchild’s SyncFET process embeds a Schottky diode in parallel
with PowerTrench MOSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
with a MOSFET. Figure 14 shows the reverses recovery
characteristic of the FDMC8200S.
Schottky barrier diodes exhibit significant leakage at high tem-
perature and high reverse voltage. This will increase the power
in the device.
7
6
5
4
3 di/dt = 300 A/μs
2
1
0
-1
-2
0 20 40 60 80 100
TIME (ns)
Figure 27. FDMC8200S SyncFET body
diode reverse recovery characteristic
0.01
0.001
0.0001
TJ = 125 oC
TJ = 100 oC
0.00001
0.000001
0
TJ = 25 oC
5 10 15 20 25
VDS, REVERSE VOLTAGE (V)
30
Figure 28. SyncFET body diode reverses
leakage versus drain-source voltage
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
10
www.fairchildsemi.com


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Dimensional Outline and Pad Layout
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
11
www.fairchildsemi.com


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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative / In Design
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
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Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
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